IDTSTAC9752AXNAED1X IDT, Integrated Device Technology Inc, IDTSTAC9752AXNAED1X Datasheet - Page 93
IDTSTAC9752AXNAED1X
Manufacturer Part Number
IDTSTAC9752AXNAED1X
Description
IC CODEC AC'97 MIC/JACK 32-QFN
Manufacturer
IDT, Integrated Device Technology Inc
Type
Audio Codec '97r
Datasheet
1.IDTSTAC9752AXNAED1XR.pdf
(106 pages)
Specifications of IDTSTAC9752AXNAED1X
Resolution (bits)
20 b
Number Of Adcs / Dacs
2 / 2
Sigma Delta
Yes
S/n Ratio, Adcs / Dacs (db) Typ
85 / 92
Voltage - Supply, Analog
3.14 V ~ 3.47 V; 4.75 V ~ 5.25 V
Voltage - Supply, Digital
3.14 V ~ 3.47 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
32-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
STAC9752AXNAED1X
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IDT™
AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK
STAC9752A/9753A
AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK
11.4. Pinout List 32-pad QFN Package
11.5. STAC9752A/9753A Digital I/O
Pin 32: To Disable SPDIF, use an 1K - 1 0 K external pullup resistor.
Pin 11: The CD_GND signal is an AC signal return for the two CD input channels. It is normally
biased at about 2.5V. The name of the pin in the AC’97 specification is CD_GND, and this has con-
fused many designers. It should not have any DC path to GND. Connecting the CD_GND signal
directly to ground will change the internal bias of the entire CODEC, and cause significant distortion.
If there is no analog CD input, then this pin can be No-Connect.
These signals connect the STAC9752A/9753A to its AC'97 controller counterpart, an external crys-
tal, multi-CODEC selection and external audio amplifier.
XTL_IN / CLOCK_IN
SDATA_OUT
Pin#
Pin Name
XTL_OUT
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
48 LQFP
Pin #
Table 35. STAC9752A/9753A Digital Connection Signals
2
3
5
SDATA_OUT
Table 34. STAC9752A/9753A 32 Pad QFN Pin List
CLOCK_IN
CD GND **
SDATA_IN
PIN Name
LINE IN R
LINE IN L
BIT_CLK
RESET#
PHONE
DVSS2
DVDD
SYNC
MIC 1
MIC 2
CD R
CD L
32 QFN
Pin #
1
2
-
93
Type
I/O
I
I
AC-Link Serial Data output
24.576 MHz Crystal
(inbound stream)
Pin#
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Description
Clock Input
STAC9752A/9753A
EAPD / GPIO
S/PDIF-OUT
VREF_OUT
Line_Out_R
Line_Out_L
Pin Name
VREF IN
AVDD2
AVSS1
AFILT1
AFILT2
AVSS3
MONO
GPIO1
HP_R
CAP2
HP_L
Internal Pull-up
/Pull-down
N/A
N/A
N/A
PC AUDIO
V 1.5 1206
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