PIC18F1320-I/SO Microchip Technology Inc., PIC18F1320-I/SO Datasheet - Page 79
PIC18F1320-I/SO
Manufacturer Part Number
PIC18F1320-I/SO
Description
Microcontroller; 8 KB Flash; 256 RAM; 256 EEPROM; 16 I/O; 18-Pin-PDIP
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F1320-ISO.pdf
(310 pages)
Specifications of PIC18F1320-I/SO
A/d Inputs
7-Channel, 10-Bit
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
16
Interface
USART
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin SOIC
Programmable Memory
8K Bytes
Ram Size
256 Bytes
Speed
20 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F1320-I/SO
Manufacturer:
MICROCHIP
Quantity:
35 000
Part Number:
PIC18F1320-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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REGISTER 9-3:
2004 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
INTCON3 REGISTER
bit 7
INT2IP: INT2 External Interrupt Priority bit
1 = High priority
0 = Low priority
INT1IP: INT1 External Interrupt Priority bit
1 = High priority
0 = Low priority
Unimplemented: Read as ‘0’
INT2IE: INT2 External Interrupt Enable bit
1 = Enables the INT2 external interrupt
0 = Disables the INT2 external interrupt
INT1IE: INT1 External Interrupt Enable bit
1 = Enables the INT1 external interrupt
0 = Disables the INT1 external interrupt
Unimplemented: Read as ‘0’
INT2IF: INT2 External Interrupt Flag bit
1 = The INT2 external interrupt occurred (must be cleared in software)
0 = The INT2 external interrupt did not occur
INT1IF: INT1 External Interrupt Flag bit
1 = The INT1 external interrupt occurred (must be cleared in software)
0 = The INT1 external interrupt did not occur
Legend:
R = Readable bit
-n = Value at POR
Note:
INT2IP
R/W-1
Interrupt flag bits are set when an interrupt condition occurs, regardless of the state
of its corresponding enable bit or the global interrupt enable bit. User software
should ensure the appropriate interrupt flag bits are clear prior to enabling an
interrupt. This feature allows for software polling.
INT1IP
R/W-1
U-0
—
W = Writable bit
‘1’ = Bit is set
INT2IE
R/W-0
INT1IE
PIC18F1220/1320
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
—
x = Bit is unknown
INT2IF
R/W-0
DS39605C-page 77
INT1IF
R/W-0
bit 0
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