PIC12F683-I/SN Microchip Technology Inc., PIC12F683-I/SN Datasheet - Page 60

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PIC12F683-I/SN

Manufacturer Part Number
PIC12F683-I/SN
Description
8 PIN, 3.5 KB FLASH, 128 RAM, 6 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC12F683-I/SN

A/d Inputs
4-Channel, 10-Bit
Comparators
1
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
5
Memory Type
Flash
Number Of Bits
8
Package Type
8-pin SOIC-N
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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0
PIC12F683
8.11
The Comparator Voltage Reference module provides
an internally generated voltage reference for the
comparators. The following features are available:
• Independent from Comparator operation
• Two 16-level voltage ranges
• Output clamped to V
• Ratiometric with V
The VRCON register (Register 8-3) controls the
Voltage Reference module shown in Figure 8-7.
8.11.1
The comparator voltage reference is independent of
the comparator configuration. Setting the VREN bit of
the VRCON register will enable the voltage reference.
8.11.2
The
voltage levels in each range. Range selection is
controlled by the VRR bit of the VRCON register. The
16 levels are set with the VR<3:0> bits of the VRCON
register.
The CV
equations:
REGISTER 8-3:
DS41211C-page 58
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3-0
R/W-0
VREN
CV
REF
REF
Comparator Voltage Reference
INDEPENDENT OPERATION
OUTPUT VOLTAGE SELECTION
output voltage is determined by the following
voltage reference has 2 ranges with 16
VREN: CV
1 = CV
0 = CV
Unimplemented: Read as ‘0’
VRR: CV
1 = Low range
0 = High range
Unimplemented: Read as ‘0’
VR<3:0>: CV
When VRR = 1: CV
When VRR = 0: CV
DD
U-0
VRCON: VOLTAGE REFERENCE CONTROL REGISTER
SS
REF
REF
REF
REF
circuit powered on
circuit powered down, no I
Range Selection bit
REF
W = Writable bit
‘1’ = Bit is set
Enable bit
Value Selection 0
R/W-0
VRR
REF
REF
= (VR<3:0>/24) * V
= V
DD
/4 + (VR<3:0>/32) * V
U-0
DD
VR<3:0>
drain and CV
DD
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
EQUATION 8-1:
The full range of V
the construction of the module. See Figure 8-1.
8.11.3
The CV
power consumption by configuring VRCON as follows:
• VREN = 0
• VRR = 1
• VR<3:0> = 0000
This allows the comparator to detect a zero-crossing
while not consuming additional CV
8.11.4
The comparator voltage reference is V
therefore, the CV
V
Voltage Reference can be found in Section 15.0
“Electrical Specifications”.
VR3
DD
15
V
V
. The tested absolute accuracy of the Comparator
DD
RR
RR
REF
REF
=
=
CV
CV
0 (high range):
1 (low range):
= V
OUTPUT CLAMPED TO V
OUTPUT RATIOMETRIC TO VDD
output voltage can be set to Vss with no
REF
REF
R/W-0
SS
VR2
REF
.
=
=
SS
output changes with fluctuations in
(VR<3:0>/24)
(V
to V
CV
DD
© 2006 Microchip Technology Inc.
DD
/4) +
x = Bit is unknown
REF
cannot be realized due to
R/W-0
VR1
OUTPUT VOLTAGE
(VR<3:0> V
REF
V
DD
module current.
DD
SS
derived and
R/W-0
VR0
DD
/32)
bit 0

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