PIC12F683-I/SN Microchip Technology Inc., PIC12F683-I/SN Datasheet - Page 64

• Manufacturer Part Number: PIC12F683-I/SN
• Description: 8 PIN, 3.5 KB FLASH, 128 RAM, 6 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC12F683-I/SN

• A/d Inputs: 4-Channel, 10-Bit
• Comparators: 1
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 5
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 8-pin SOIC-N
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC12F683
9.1.3
The VCFG bit of the ADCON0 register provides control
of the positive voltage reference. The positive voltage
reference can be either V
source. The negative voltage reference is always
connected to the ground reference.
9.1.4
The source of the conversion clock is software select-
able via the ADCS bits of the ANSEL register. There
are seven possible clock options:
• F
• F
• F
• F
• F
• F
• F
TABLE 9-1:
FIGURE 9-2:
DS41211C-page 62
Legend: Shaded cells are outside of recommended range.
Note 1:
ADC Clock Source
OSC
OSC
OSC
OSC
OSC
OSC
RC
(dedicated internal oscillator)
F
F
F
2:
3:
4:
/2
/4
/8
/16
/32
/64
F
F
F
OSC
OSC
OSC
OSC
OSC
OSC
F
ADC Clock Period (T
RC
The F
These values violate the minimum required T
For faster conversion times, the selection of another clock source is recommended.
When the device frequency is greater than 1 MHz, the F
conversion will be performed during Sleep.
ADC V
/16
/32
/64
CONVERSION CLOCK
T
/2
/4
/8
CY
Set GO/DONE bit
Holding Capacitor is Disconnected from Analog Input (typically 100 ns)
to T
RC
ADC CLOCK PERIOD (T
OLTAGE REFERENCE
AD
source has a typical T
Conversion Starts
ANALOG-TO-DIGITAL CONVERSION T
T
AD
1 T
DD
ADCS<2:0>
AD
or an external voltage
b9
AD
000
100
001
101
010
110
x11
2 T
)
AD
b8
3 T
AD
AD
b7
time of 4 s for V
AD
4 T
) V
2-6 s
100 ns
200 ns
400 ns
800 ns
20 MHz
AD
1.6 s
3.2 s
b6
S
5 T
. DEVICE OPERATING FREQUENCIES (VDD > 3.0V)
(1,4)
AD
(2)
(2)
(2)
(2)
AD
b5
time.
6 T
DD
The time to complete one bit conversion is defined as
T
as shown in Figure 9-2.
For correct conversion, the appropriate T
must be met. See A/D conversion requirements in
Section 15.0 “Electrical Specifications” for more
information. Table 9-1 gives examples of appropriate
ADC clock selections.
ADRESH and ADRESL registers are loaded,
GO bit is cleared,
ADIF bit is set,
Holding capacitor is connected to analog input
AD
AD
b4
Note:
> 3.0V.
. One full 10-bit conversion requires 11 T
7 T
2-6 s
RC
Device Frequency (F
250 ns
500 ns
1.0 s
8.0 s
AD
8 MHz
2.0 s
4.0 s
clock source is only recommended if the
AD
b3
CYCLES
(1,4)
8 T
(2)
(3)
(2)
(2)
Unless using the F
system clock frequency will change the
ADC
adversely affect the ADC result.
AD
b2
9
clock
T
AD
b1
2-6 s
16.0 s
500 ns
1.0 s
8.0 s
10 T
© 2006 Microchip Technology Inc.
4 MHz
2.0 s
4.0 s
OSC
frequency,
AD
b0
(1,4)
(2)
(3)
(2)
(3)
11
RC
)
, any changes in the
AD
2-6 s
16.0 s
32.0 s
64.0 s
which
8.0 s
1 MHz
2.0 s
4.0 s
specification
AD
(1,4)
periods
(3)
(3)
(3)
(3)
may