DSPIC30F2012-20I/SP Microchip Technology Inc., DSPIC30F2012-20I/SP Datasheet - Page 135
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DSPIC30F2012-20I/SP
Manufacturer Part Number
DSPIC30F2012-20I/SP
Description
16 BIT MCU/DSP 28LD 20MIPS 12 KB FLASH
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet
1.DSPIC30F2012-20ISP.pdf
(204 pages)
Specifications of DSPIC30F2012-20I/SP
A/d Inputs
10-Channels, 12-Bit
Cpu Speed
30 MIPS
Eeprom Memory
0 Bytes
Input Output
20
Interface
I2C/SPI/UART, USART
Ios
20
Memory Type
Flash
Number Of Bits
16
Package Type
28-pin SPDIP
Programmable Memory
12K Bytes
Ram Size
1K Bytes
Timers
3-16-bit, 1-32-bit
Voltage, Range
2.5-5.5
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F2012-20I/SP
Manufacturer:
Microchip Technology
Quantity:
135
Part Number:
DSPIC30F2012-20I/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
18.0
The
enhancements to the previous PICmicro
tion sets, while maintaining an easy migration from
PICmicro MCU instruction sets.
Most instructions are a single program memory word
(24 bits). Only three instructions require two program
memory locations.
Each single-word instruction is a 24-bit word divided
into an 8-bit opcode which specifies the instruction
type, and one or more operands which further specify
the operation of the instruction.
The instruction set is highly orthogonal and is grouped
into five basic categories:
• Word or byte-oriented operations
• Bit-oriented operations
• Literal operations
• DSP operations
• Control operations
Table 18-1 shows the general symbols used in
describing the instructions.
The dsPIC30F instruction set summary in Table 18-2
lists all the instructions, along with the status flags
affected by each instruction.
Most word or byte-oriented W register instructions
(including
operands:
• The first source operand which is typically a
• The second source operand which is typically a
• The destination of the result which is typically a
However, word or byte-oriented file register instructions
have two operands:
• The file register specified by the value ‘f’
• The destination, which could either be the file
© 2006 Microchip Technology Inc.
Note: This data sheet summarizes features of this group
of dsPIC30F devices and is not intended to be a complete
reference source. For more information on the CPU,
peripherals, register descriptions and general device
functionality, refer to the “ dsPIC30F Family Reference
Manual” (DS70046). For more information on the device
instruction set and programming, refer to the “ dsPIC30F
Programmer’s Reference Manual” (DS70030).
register ‘Wb’ without any address modifier
register ‘Ws’ with or without an address modifier
register ‘Wd’ with or without an address modifier
register ‘f’ or the W0 register, which is denoted as
‘WREG’
dsPIC30F
INSTRUCTION SET SUMMARY
barrel
shift
instruction
instructions)
set
dsPIC30F2011/2012/3012/3013
®
adds
MCU instruc-
have
many
three
Most bit-oriented instructions (including simple rotate/
shift instructions) have two operands:
• The W register (with or without an address
• The bit in the W register or file register
The literal instructions that involve data movement may
use some of the following operands:
• A literal value to be loaded into a W register or file
• The W register or file register where the literal
However, literal instructions that involve arithmetic or
logical operations use some of the following operands:
• The first source operand which is a register ‘Wb’
• The second source operand which is a literal
• The destination of the result (only if not the same
The MAC class of DSP instructions may use some of the
following operands:
• The accumulator (A or B) to be used (required
• The W registers to be used as the two operands
• The X and Y address space prefetch operations
• The X and Y address space prefetch destinations
• The accumulator write-back destination
The other DSP instructions do not involve any
multiplication, and may include:
• The accumulator to be used (required)
• The source or destination operand (designated as
• The amount of shift specified by a W register ‘Wn’
The control instructions may use some of the following
operands:
• A program memory address
• The mode of the table read and table write
modifier) or file register (specified by the value of
‘Ws’ or ‘f’)
(specified by a literal value or indirectly by the
contents of register ‘Wb’)
register (specified by the value of ‘k’)
value is to be loaded (specified by ‘Wb’ or ‘f’)
without any address modifier
value
as the first source operand) which is typically a
register ‘Wd’ with or without an address modifier
operand)
Wso or Wdo, respectively) with or without an
address modifier
or a literal value
instructions
DS70139D-page 133