DSPIC30F2012-30I/SP Microchip Technology Inc., DSPIC30F2012-30I/SP Datasheet - Page 118

• Manufacturer Part Number: DSPIC30F2012-30I/SP
• Description: DSP, 16-Bit, 12 KB Flash, 1KB RAM, 20 I/O, PDIP-28
• Manufacturer: Microchip Technology Inc.
• Type: DSPr

Specifications of DSPIC30F2012-30I/SP

• A/d Inputs: 10-Channels, 12-Bit
• Cpu Speed: 30 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 20
• Interface: I2C, SPI, UART/USART
• Ios: 20
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 28-pin SPDIP
• Programmable Memory: 12K Bytes
• Ram Size: 1K Bytes
• Timers: 3-16-bit, 1-32-bit
• Voltage, Range: 2.5-5.5
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

TABLE 16-2:
ADCBUF0
ADCBUF1
ADCBUF2
ADCBUF3
ADCBUF4
ADCBUF5
ADCBUF6
ADCBUF7
ADCBUF8
ADCBUF9
ADCBUFA
ADCBUFB 0296
ADCBUFC 0298
ADCBUFD 029A
ADCBUFE 029C
ADCBUFF 029E
ADCON1
ADCON2
ADCON3
ADCHS
ADPCFG
ADCSSL
Legend:
Name
Note:
SFR
Addr.
0280
0282
0284
0286
0288
028A
028C
028E
0290
0292
0294
02A0
02A4
02A6
02A8
02AA
02A2
u = uninitialized bit
Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
ADON
Bit 15
A/D CONVERTER REGISTER MAP FOR dsPIC30F2011/3012
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
VCFG<2:0>
Bit 14
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
ADSIDL
Bit 13
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
CH0NB
Bit 12
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Bit 11
—
—
—
—
SAMC<4:0>
CSCNA
Bit 10
CH0SB<3:0>
—
—
—
Bit 9
FORM<1:0>
—
—
—
Bit 8
—
—
—
PCFG7 PCFG6 PCFG5
CSSL7
ADRC
BUFS
Bit 7
—
SSRC<2:0>
ADC Data Buffer 10
ADC Data Buffer 12
ADC Data Buffer 13
ADC Data Buffer 14
ADC Data Buffer 15
ADC Data Buffer 11
ADC Data Buffer 0
ADC Data Buffer 1
ADC Data Buffer 2
ADC Data Buffer 3
ADC Data Buffer 4
ADC Data Buffer 5
ADC Data Buffer 6
ADC Data Buffer 7
ADC Data Buffer 8
ADC Data Buffer 9
CSSL6
Bit 6
—
—
—
CSSL5
Bit 5
—
CH0NA
PCFG4
CSSL4
Bit 4
—
SMPI<3:0>
PCFG3 PCFG2 PCFG1
CSSL3
Bit 3
—
ADCS<5:0>
CSSL2
ASAM
Bit 2
CH0SA<3:0>
CSSL1
SAMP
BUFM
Bit 1
PCFG0
CSSL0
DONE
ALTS
Bit 0
0000 uuuu uuuu uuuu
0000 uuuu uuuu uuuu
0000 uuuu uuuu uuuu
0000 uuuu uuuu uuuu
0000 uuuu uuuu uuuu
0000 uuuu uuuu uuuu
0000 uuuu uuuu uuuu
0000 uuuu uuuu uuuu
0000 uuuu uuuu uuuu
0000 uuuu uuuu uuuu
0000 uuuu uuuu uuuu
0000 uuuu uuuu uuuu
0000 uuuu uuuu uuuu
0000 uuuu uuuu uuuu
0000 uuuu uuuu uuuu
0000 uuuu uuuu uuuu
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
Reset State