MT46V64M8TG-6T:F Micron Technology Inc, MT46V64M8TG-6T:F Datasheet - Page 38
![](/photos/31/34/313420/66pin_tsop_sml.jpg)
MT46V64M8TG-6T:F
Manufacturer Part Number
MT46V64M8TG-6T:F
Description
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Datasheet
1.MT46V64M8TG-6TF.pdf
(91 pages)
Specifications of MT46V64M8TG-6T:F
Organization
64Mx8
Density
512Mb
Address Bus
15b
Access Time (max)
700ps
Maximum Clock Rate
333MHz
Operating Supply Voltage (typ)
2.5V
Package Type
TSOP
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.3V
Supply Current
175mA
Pin Count
66
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Not Compliant
Figure 13:
Figure 14:
PDF: 09005aef80a1d9d4/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 512Mb DDR: Rev. N; Core DDR Rev. B 2/09 EN
Full Drive Pull-Down Characteristics
Full Drive Pull-Up Characteristics
39. Reduced output drive curves:
38d. The driver pull-up current variation within nominal limits of voltage and temper-
39b. The driver pull-down current variation, within nominal voltage and temperature
38c. The full driver pull-up current variation from MIN to MAX process; temperature
38e. The full ratio variation of MAX to MIN pull-up and pull-down current should be
39a. The full driver pull-down current variation from MIN to MAX process; tempera-
39c. The full driver pull-up current variation from MIN to MAX process; temperature
38f. The full ratio variation of the nominal pull-up to pull-down current should be
-100
-120
-140
-160
-180
-200
160
140
120
100
-2 0
-4 0
-6 0
-8 0
80
60
40
20
0
0
0.0
0. 0
and voltage will lie within the outer bounding lines of the V-I curve of Figure 14 on
page 38.
ature is expected, but not guaranteed, to lie within the inner bounding lines of the
V-I curve of Figure 14 on page 38.
between 0.71 and 1.4 for drain-to-source voltages from 0.1V to 1.0V at the same
voltage and temperature.
unity ±10% for device drain-to-source voltages from 0.1V to 1.0V.
ture and voltage will lie within the outer bounding lines of the V-I curve of
Figure 15 on page 39.
limits, is expected, but not guaranteed, to lie within the inner bounding lines of
the V-I curve of Figure 15 on page 39.
and voltage will lie within the outer bounding lines of the V-I curve of Figure 16.
0.5
0 . 5
1. 0
1.0
V
DD
V
Q - V
OUT
38
(V)
OUT
(V)
1 . 5
1.5
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Electrical Specifications – DC and AC
2. 0
2.0
512Mb: x4, x8, x16 DDR SDRAM
2 . 5
2.5
©2000 Micron Technology, Inc. All rights reserved.