MC9S08GW64CLK Freescale Semiconductor, MC9S08GW64CLK Datasheet - Page 31
MC9S08GW64CLK
Manufacturer Part Number
MC9S08GW64CLK
Description
S08 8bit Microcontroller
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets
1.MC9S08GW64CLK.pdf
(42 pages)
2.MC9S08GW64CLK.pdf
(2 pages)
3.MC9S08GW64CLK.pdf
(574 pages)
Specifications of MC9S08GW64CLK
Core Processor
HCS08
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LCD, PWM, WDT
Number Of I /o
45
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 16x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-LQFP
Processor Series
MC9S08GW64
Core
S08
Data Bus Width
8 bit
Data Ram Size
4032 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
57
Number Of Timers
3
Operating Supply Voltage
- 0.3 V to + 3.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Operating Temperature Range
- 40 C to + 85 C
Supply Current (max)
60 uA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S08GW64CLK
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
3.10.3
Table 15
Freescale Semiconductor
1.There is 20 pF load on the SPI ports.
2.There are three types of SPI ports in MC9S08GW64 Series. They are ports for AMR, ports shared with LCD pads
and normal ports. This timing is for normal ports condition.
and
Figure 20
SPI Timing
No.
—
10
11
12
1
2
3
4
5
6
7
8
9
C
D
D
D
D
D
D
D
D
D
D
D
D
D
through
Operating frequency
SPSCK period
Enable lead time
Enable lag time
Clock (SPSCK) high or low time
Data setup time (inputs)
Data hold time (inputs)
Slave access time
Slave MISO disable time
Data valid (after SPSCK edge)
Data hold time (outputs)
Rise time
Fall time
Master
Slave
Master
Slave
Master
Slave
Master
Slave
Master
Slave
Master
Slave
Master
Slave
Master
Slave
Master
Slave
Input
Output
Input
Output
Figure 23
MC9S08GW64 Series MCU Data Sheet, Rev. 3
Function
describe the timing requirements for the SPI system
Table 15. SPI Timing
t
Symbol
WSPSCK
t
SPSCK
t
Lead
t
t
t
t
t
t
f
Lag
t
t
t
HO
RO
SU
t
dis
FO
op
t
HI
RI
FI
a
v
f
t
t
Bus
cyc
cyc
Min
12
12
30
30
25
—
—
—
—
—
—
—
—
/2048
0
2
4
1
1
0
0
0
–30
– 30
1,2
.
Electrical Characteristics
1024 t
t
t
cyc
cyc
f
f
2048
Max
Bus
Bus
60
60
25
25
—
—
—
—
—
—
—
—
—
—
—
—
1
1
– 25
– 25
/2
/4
cyc
t
t
SPSCK
SPSCK
Unit
t
t
t
t
t
t
Hz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
cyc
cyc
cyc
cyc
cyc
cyc
31