PIC32MX440F512H-80V/MR Microchip Technology, PIC32MX440F512H-80V/MR Datasheet - Page 142
![512 KB Flash, 32 KB RAM, USB-OTG, 80 MHz, 10-Bit ADC, DMA 64 QFN 9x9x0.9mm TUBE](/photos/40/62/406286/landingpagemicrochippic32_sml.jpg)
PIC32MX440F512H-80V/MR
Manufacturer Part Number
PIC32MX440F512H-80V/MR
Description
512 KB Flash, 32 KB RAM, USB-OTG, 80 MHz, 10-Bit ADC, DMA 64 QFN 9x9x0.9mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheet
1.TDGL001.pdf
(214 pages)
Specifications of PIC32MX440F512H-80V/MR
Processor Series
PIC32MX4xx
Core
MIPS
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
512 KB
Data Ram Size
32 KB
Interface Type
USB, I2C, UART, RS-232, RS-485, SPI
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
5
Number Of Timers
5
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Package / Case
QFN-64
Operating Temperature Range
- 40 C to + 105 C
Supply Current (max)
10 mA
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Eeprom Size
-
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Lead Free Status / Rohs Status
Details
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PIC32MX3XX/4XX
TABLE 27-1:
DS61143H-page 142
BLEZL
BLTZ
BLTZAL
BLTZALL
BLTZL
BNE
BNEL
BREAK
CLO
CLZ
DERET
DI
DIV
DIVU
EHB
EI
ERET
EXT
INS
J
Note 1:
Instruction
This instruction is deprecated and should not be used.
MIPS32
Branch on Less Than or Equal to Zero Likely
Branch on Less Than Zero
Branch on Less Than Zero and Link
Branch on Less Than Zero and Link Likely
Branch on Less Than Zero Likely
Branch on Not Equal
Branch on Not Equal Likely
Breakpoint
Count Leading Ones
Count Leading Zeroes
Return from Debug Exception
Atomically Disable Interrupts
Divide
Unsigned Divide
Execution Hazard Barrier
Atomically Enable Interrupts
Return from Exception
Extract Bit Field
Insert Bit Field
Unconditional Jump
®
INSTRUCTION SET (CONTINUED)
Description
(1)
(1)
(1)
(1)
if Rs[31] || Rs == 0
else
if Rs[31]
GPR[31] = PC + 8
if Rs[31]
GPR[31] = PC + 8
if Rs[31]
else
if Rs[31]
else
if Rs != Rt
if Rs != Rt
else
Break Exception
Rd = NumLeadingOnes(Rs)
Rd = NumLeadingZeroes(Rs)
PC = DEPC
Exit Debug Mode
Rt = Status; Status
LO = (int)Rs / (int)Rt
HI = (int)Rs % (int)Rt
LO = (uns)Rs / (uns)Rt
HI = (uns)Rs % (uns)Rt
Stop instruction execution
until execution hazards are
cleared
Rt = Status; Status
if Status
else
Status
LL = 0
Rt = ExtractField(Rs, pos,
size)
Rt = InsertField(Rs, Rt, pos,
size)
PC = PC[31:28] || offset<<2
PC += (int)offset
Ignore Next Instruction
PC += (int)offset
PC += (int)offset
PC += (int)offset
Ignore Next Instruction
PC += (int)offset
Ignore Next Instruction
PC += (int)offset
PC += (int)offset
Ignore Next Instruction
PC = ErrorEPC
PC = EPC
Status
ERL
EXL
ERL
© 2011 Microchip Technology Inc.
= 0
= 0
Function
IE
IE
= 0
= 1
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