PIC32MX440F512H-80V/MR Microchip Technology, PIC32MX440F512H-80V/MR Datasheet - Page 51
![512 KB Flash, 32 KB RAM, USB-OTG, 80 MHz, 10-Bit ADC, DMA 64 QFN 9x9x0.9mm TUBE](/photos/40/62/406286/landingpagemicrochippic32_sml.jpg)
PIC32MX440F512H-80V/MR
Manufacturer Part Number
PIC32MX440F512H-80V/MR
Description
512 KB Flash, 32 KB RAM, USB-OTG, 80 MHz, 10-Bit ADC, DMA 64 QFN 9x9x0.9mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheet
1.TDGL001.pdf
(214 pages)
Specifications of PIC32MX440F512H-80V/MR
Processor Series
PIC32MX4xx
Core
MIPS
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
512 KB
Data Ram Size
32 KB
Interface Type
USB, I2C, UART, RS-232, RS-485, SPI
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
5
Number Of Timers
5
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Package / Case
QFN-64
Operating Temperature Range
- 40 C to + 105 C
Supply Current (max)
10 mA
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Eeprom Size
-
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Lead Free Status / Rohs Status
Details
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- Download datasheet (5Mb)
TABLE 4-2:
Legend:
Note
1000
1010 INTSTAT
1020
1030
1040
1060
1070
1090
10A0
10B0
10C0
10D0
10E0
10F0
1100
1110
1120
1140
1:
2:
INTCON
IPTMR
IPC11
IFS0
IFS1
IEC0
IEC1
IPC0
IPC1
IPC2
IPC3
IPC4
IPC5
IPC6
IPC7
IPC8
IPC9
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Except where noted, all registers in this table have corresponding CLR, SET, and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See
Registers”
This register does not have associated CLR, SET, and INV registers.
(2)
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
INTERRUPT REGISTERS MAP FOR PIC32MX440F128L, PIC32MX460F256L AND PIC32MX460F512L DEVICES ONLY
for more information.
I2C1MIE
I2C1MIF
RTCCIF
RTCCIE
INT3IF
INT3IE
31/15
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
I2C1SIF
FSCMIF
I2C1SIE
FSCMIE
OC3IF
OC3IE
30/14
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
I2C2MIF
I2C2MIE
I2C1BIF
I2C1BIE
29/13
IC3IF
IC3IE
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
I2C2SIF
I2C2SIE
U1TXIF
U1TXIE
MVEC
28/12
T3IE
T3IF
—
—
—
—
—
—
CMP1IP<2:0>
RTCCIP<2:0>
DMA3IP<2:0>
DMA1IP<2:0>
INT0IP<2:0>
CS0IP<2:0>
INT1IP<2:0>
INT2IP<2:0>
INT3IP<2:0>
INT4IP<2:0>
SPI1IP<2:0>
AD1IP<2:0>
I2C1IP<2:0>
SPI2IP<2:0>
I2C2IP<2:0>
USBIP<2:0>
IC1IP<2:0>
IC2IP<2:0>
IC3IP<2:0>
IC4IP<2:0>
IC5IP<2:0>
U1RXIF
I2C2BIF
U1RXIE
I2C2BIE
INT2IF
INT2IE
27/11
—
—
—
—
—
—
—
U2TXIE
U2TXIF
OC2IE
U1EIF
OC2IF
U1EIE
26/10
—
—
—
—
—
SRIPL<2:0>
TPC<2:0>
SPI1RXIF SPI1TXIF
SPI1RXIE SPI1TXIE
U2RXIF
U2RXIE
USBIF
USBIE
IC2IE
IC2IF
25/9
—
—
CMP1IS<1:0>
RTCCIS<1:0>
DMA3IS<1:0>
DMA1IS<1:0>
—
INT0IS<1:0>
INT1IS<1:0>
INT2IS<1:0>
INT3IS<1:0>
INT4IS<1:0>
SPI1IS<1:0>
I2C1IS<1:0>
SPI2IS<1:0>
I2C2IS<1:0>
USBIS<1:0>
CS0IS<1:0>
AD1IS<1:0>
IC1IS<1:0>
IC2IS<1:0>
IC3IS<1:0>
IC4IS<1:0>
IC5IS<1:0>
FCEIE
FCEIF
U2EIF
U2EIE
24/8
T2IF
T2IE
—
—
—
IPTMR<31:0>
Bits
SPI2RXIF
SPI2RXIE
SPI1EIF
SPI1EIE
INT1IE
INT1IF
23/7
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
SPI2TXIF
SPI2TXIE
OC5IF
OC1IF
OC5IE
OC1IE
22/6
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
SPI2EIE
SPI2EIF
IC5IF
IC1IF
IC5IE
IC1IE
21/5
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
CMP2IE
INT4EP
CMP2IF
20/4
T5IF
T1IF
T5IE
T1IE
—
—
—
—
—
FSCMIP<2:0>
CMP2IP<2:0>
DMA2IP<2:0>
DMA0IP<2:0>
PMPIP<2:0>
CS1IP<2:0>
OC1IP<2:0>
OC2IP<2:0>
OC3IP<2:0>
OC4IP<2:0>
OC5IP<2:0>
FCEIP<2:0>
CNIP<2:0>
CTIP<2:0>
T1IP<2:0>
T2IP<2:0>
T3IP<2:0>
T4IP<2:0>
T5IP<2:0>
U1IP<2:0>
U2IP<2:0>
DMA3IE
CMP1IE
INT3EP
DMA3IF
CMP1IF
INT4IF
INT0IF
INT4IE
INT0IE
19/3
—
—
—
VEC<5:0>
DMA2IF
DMA2IE
Section 12.1.1 “CLR, SET and INV
INT2EP
OC4IF
PMPIF
OC4IE
PMPIE
CS1IF
CS1IE
18/2
—
—
—
DMA1IF
DMA1IE
INT1EP
CS0IE
AD1IE
CS0IF
AD1IF
IC4IF
IC4IE
17/1
—
—
—
CMP2IS<1:0>
FSCMIS<1:0>
DMA2IS<1:0>
DMA0IS<1:0>
PMPIS<1:0>
CS1IS<1:0>
OC1IS<1:0>
OC2IS<1:0>
OC3IS<1:0>
OC4IS<1:0>
OC5IS<1:0>
FCEIS<1:0>
CNIS<1:0>
CTIS<1:0>
U1IS<1:0>
U2IS<1:0>
T1IS<1:0>
T2IS<1:0>
T3IS<1:0>
T4IS<1:0>
T5IS<1:0>
DMA0IF
DMA0IE
INT0EP
CNIE
CTIF
CNIF
CTIE
16/0
SS0
T4IF
T4IE
(1)
—
—
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
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