PIC32MX440F512H-80V/MR Microchip Technology, PIC32MX440F512H-80V/MR Datasheet - Page 70
![512 KB Flash, 32 KB RAM, USB-OTG, 80 MHz, 10-Bit ADC, DMA 64 QFN 9x9x0.9mm TUBE](/photos/40/62/406286/landingpagemicrochippic32_sml.jpg)
PIC32MX440F512H-80V/MR
Manufacturer Part Number
PIC32MX440F512H-80V/MR
Description
512 KB Flash, 32 KB RAM, USB-OTG, 80 MHz, 10-Bit ADC, DMA 64 QFN 9x9x0.9mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheet
1.TDGL001.pdf
(214 pages)
Specifications of PIC32MX440F512H-80V/MR
Processor Series
PIC32MX4xx
Core
MIPS
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
512 KB
Data Ram Size
32 KB
Interface Type
USB, I2C, UART, RS-232, RS-485, SPI
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
5
Number Of Timers
5
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Package / Case
QFN-64
Operating Temperature Range
- 40 C to + 105 C
Supply Current (max)
10 mA
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Eeprom Size
-
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Lead Free Status / Rohs Status
Details
- Current page: 70 of 214
- Download datasheet (5Mb)
TABLE 4-21:
TABLE 4-22:
Legend:
Note
Legend:
Note
6000
6010
6020
6030
6040
6050
6060
6070
1:
1:
PORTB
PORTA
TRISA
TRISB
ODCB
ODCA
LATB
LATA
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See
information.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See
information.
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
PORTA REGISTERS MAP FOR PIC32MX320F128L, PIC32MX340F128L, PIC32MX360F256L, PIC32MX360F512L,
PIC32MX440F128L, PIC32MX460F256L AND PIC32MX460F512L DEVICES ONLY
PORTB REGISTERS MAP
TRISB15
ODCB15
TRISA15
ODCA15
LATB15
LATA15
31/15
RB15
31/15
RA15
—
—
—
—
—
—
—
—
TRISB14
ODCB14
TRISA14
ODCA14
LATB14
LATA14
30/14
RB14
30/14
RA14
—
—
—
—
—
—
—
—
TRISB13
ODCB13
LATB13
29/13
29/13
RB13
—
—
—
—
—
—
—
—
—
—
—
—
TRISB12
ODCB12
LATB12
28/12
28/12
RB12
(1)
—
—
—
—
—
—
—
—
—
—
—
—
TRISB11
ODCB11
LATB11
27/11
27/11
RB11
—
—
—
—
—
—
—
—
—
—
—
—
TRISB10
ODCB10
TRISA10
ODCA10
LATB10
LATA10
26/10
RB10
26/10
RA10
—
—
—
—
—
—
—
—
TRISB9
ODCB9
TRISA9
ODCA9
LATB9
LATA9
25/9
RB9
25/9
RA9
—
—
—
—
—
—
—
—
TRISB8
ODCB8
LATB8
24/8
RB8
24/8
—
—
—
—
—
—
—
—
—
—
—
—
Bits
Bits
TRISB7
ODCB7
TRISA7
ODCA7
LATB7
LATA7
23/7
RB7
23/7
RA7
—
—
—
—
—
—
—
—
TRISB6
ODCB6
TRISA6
ODCA6
LATB6
LATA6
22/6
RB6
22/6
RA6
—
—
—
—
—
—
—
—
TRISB5
ODCB5
TRISA5
ODCA5
LATB5
LATA5
21/5
RB5
21/5
RA5
—
—
—
—
—
—
—
—
(1)
TRISB4
ODCB4
TRISA4
ODCA4
LATB4
LATA4
20/4
20/4
RB4
RA4
—
—
—
—
—
—
—
—
Section 12.1.1 “CLR, SET and INV Registers”
Section 12.1.1 “CLR, SET and INV Registers”
TRISB3
ODCB3
TRISA3
ODCA3
LATB3
LATA3
19/3
RB3
19/3
RA3
—
—
—
—
—
—
—
—
TRISB2
ODCB2
TRISA2
ODCA2
LATB2
LATA2
18/2
RB2
18/2
RA2
—
—
—
—
—
—
—
—
TRISB1
ODCB1
TRISA1
ODCA1
LATB1
LATA1
17/1
RB1
17/1
RA1
—
—
—
—
—
—
—
—
TRISB0
ODCB0
TRISA0
ODCA0
LATB0
LATA0
16/0
RB0
16/0
RA0
—
—
—
—
—
—
—
—
for more
for more
0000
FFFF
0000
xxxx
0000
xxxx
0000
0000
0000
C6FF
0000
xxxx
0000
xxxx
0000
0000
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