TDGL003 Microchip Technology, TDGL003 Datasheet - Page 75
TDGL003
Manufacturer Part Number
TDGL003
Description
ChipKIT Max32 Development Board PIC32 Boards And Kits
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Type
MCUr
Specifications of TDGL003
Silicon Manufacturer
Microchip
Core Architecture
MIPS
Core Sub-architecture
PIC32
Silicon Core Number
PIC32MX
Silicon Family Name
PIC32MX795Fxxxx
Kit Contents
Board Only
Contents
Board
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
MPLAB®, Arduino™ Mega
- Current page: 75 of 214
- Download datasheet (5Mb)
TABLE 4-31:
TABLE 4-32:
Legend:
Note
Legend:
Note
6140
6150
6160
6170
6140
6150
6160
6170
1:
1:
PORTF
PORTF
TRISF
ODCF
TRISF
ODCF
LATF
LATF
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See
information.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See
information.
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
PORTF REGISTERS MAP FOR PIC32MX320F032H, PIC32MX320F064H, PIC32MX320F128H, PIC32MX340F128H,
PIC32MX340F256H AND PIC32MX340F512H DEVICES ONLY
PORTF REGISTERS MAP FOR PIC32MX420F032H, PIC32MX440F128H AND PIC2MX440F256H DEVICES ONLY
31/15
31/15
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
30/14
30/14
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
29/13
29/13
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
28/12
28/12
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
27/11
27/11
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
26/10
26/10
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
25/9
25/9
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
24/8
24/8
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Bits
Bits
(1)
23/7
23/7
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
TRISF6
ODCF6
LATF6
22/6
22/6
RF6
—
—
—
—
—
—
—
—
—
—
—
—
TRISF5
TRISF5
ODCF5
ODCF5
LATF5
LATF5
21/5
21/5
RF5
RF5
—
—
—
—
—
—
—
—
TRISF4
ODCF4
TRISF4
ODCF4
LATF4
LATF4
20/4
20/4
RF4
RF4
—
—
—
—
—
—
—
—
Section 12.1.1 “CLR, SET and INV Registers”
Section 12.1.1 “CLR, SET and INV Registers”
TRISF3
ODCF3
TRISF3
ODCF3
LATF3
LATF3
19/3
RF3
19/3
RF3
—
—
—
—
—
—
—
—
TRISF2
ODCF2
TRISF2
ODCF2
LATF2
LATF2
18/2
18/2
RF2
RF2
—
—
—
—
—
—
—
—
TRISF1
ODCF1
TRISF1
ODCF1
LATF1
LATF1
17/1
17/1
RF1
RF1
—
—
—
—
—
—
—
—
(1)
TRISF0
ODCF0
TRISF0
ODCF0
LATF0
LATF0
16/0
16/0
RF0
RF0
—
—
—
—
—
—
—
—
for more
for more
0000
07FF
0000
xxxx
0000
xxxx
0000
0000
0000
03FF
0000
xxxx
0000
xxxx
0000
0000
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