CY7C68000A-56LTXC Cypress Semiconductor Corp, CY7C68000A-56LTXC Datasheet - Page 14
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CY7C68000A-56LTXC
Manufacturer Part Number
CY7C68000A-56LTXC
Description
IC TXRX USB 2.0 TX2 56VQFN
Manufacturer
Cypress Semiconductor Corp
Series
CY7Cr
Type
Transceiverr
Datasheet
1.CY7C68000A-56BAXC.pdf
(15 pages)
Specifications of CY7C68000A-56LTXC
Protocol
USB 2.0
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
56-VQFN Exposed Pad, 56-HVQFN, 56-SQFN, 56-DHVQFN
For Use With
CY3685 - KIT DEV EZ-USB NX2LPCY3683 - KIT EZ-USB TX2 DEVELOPMENT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Quad Flat Package No Leads (QFN) Package
Design Notes
Electrical contact of the part to the Printed Circuit Board (PCB)
is made by soldering the leads on the bottom surface of the
package to the PCB. Hence, special attention is required to the
heat transfer area below the package to provide a good thermal
bond to the circuit board. A Copper (Cu) fill is to be designed into
the PCB as a thermal pad under the package. Heat is transferred
from the MoBL-USB TX2 through the device’s metal paddle on
the package bottom. From here, heat is conducted to the PCB at
the thermal pad. It is then conducted from the thermal pad to the
PCB inner ground plane by an array of via. A via is a plated
through-hole in the PCB with a finished diameter of 13 mil. The
QFN’s metal die paddle must be soldered to the PCB’s thermal
pad. Solder mask is placed on the board top, over each via, to
resist solder flow into the via. The mask on the top side also
minimizes outgassing during the solder reflow process.
Document #: 38-08052 Rev. *H
Via hole for thermally connecting the
QFN to the circuit board ground plane.
PCB Material
Figure 8. Cross section of the Area Underneath the QFN Package
Figure 9. Plot of the Solder Mask (White Area)
Cu Fill
Solder Mask
0.013” dia
0.017” dia
This figure only shows the top three layers of the
circuit board: Top Solder, PCB Dielectric, and
the Ground Plane
For further information on this package design, refer to the appli-
cation note “Surface Mount Assembly of AMKOR’s MicroLead-
Frame (MLF) Technology.” Download this application note from
AMKOR’s
http://www.amkor.com/products/notes_papers/MLFApp
Note.pdf. The application note provides detailed information on
board mounting guidelines, soldering flow, and rework process.
Figure 8
cross section is of only one via. The solder paste template needs
to be designed to enable at least 50 percent solder coverage.
The thickness of the solder paste template should be 5 mil. It is
recommended that ‘No Clean’, type 3 solder paste be used for
mounting the part. Nitrogen purge is recommended during
reflow.
Figure 9
assembly (darker areas indicate solder).
Cu Fill
PCB Material
displays a cross-sectional area under the package. The
is a plot of the solder mask pattern image of the
website,
by
following
CY7C68000A
Page 14 of 15
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link:
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