MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 184
MOD5234-100IR
Manufacturer Part Number
MOD5234-100IR
Description
MOD5234 10/100 ETHERNET MODULE
Manufacturer
NetBurner Inc
Type
Controllers & Processorsr
Datasheets
1.MOD5272-100IR.pdf
(3 pages)
2.MOD5234-100IR.pdf
(4 pages)
3.MOD5234-100IR.pdf
(754 pages)
Specifications of MOD5234-100IR
Interface
I²C, SPI, UART
Voltage - Supply
2.5V
Mounting Type
Surface Mount
Package / Case
Module
Product
Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Format
-
Baud Rates
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q4483564
- Current page: 184 of 754
- Download datasheet (13Mb)
Power Management
8.3.2.16 Clock Module
In wait and doze modes, the clocks to the CPU and SRAM will be stopped and the system clocks
to the peripherals are enabled. Each module may disable the module clocks locally at the module
level. In stop mode, all clocks to the system will be stopped.
During stop mode, the PLL continues to run. The external CLKOUT signal may be enabled or
disabled when the device enters stop mode, depending on the LPCR[STPMD] bit settings.
The external CLKOUT output pin may be disabled to lower power consumption via the
SYNCR[DISCLK] bit. The external CLKOUT pin function is enabled by default at reset.
8.3.2.17 Edge Port
In wait and doze modes, the edge port continues to operate normally and may be configured to
generate interrupts (either an edge transition or low level on an external pin) to exit the low-power
modes.
In stop mode, there is no system clock available to perform the edge detect function. Thus, only
the level detect logic is active (if configured) to allow any low level on the external interrupt pin
to generate an interrupt (if enabled) to exit the stop mode.
8.3.2.18 Watchdog Timer
In stop mode (or in wait/doze mode, if so programmed), the watchdog ceases operation and freezes
at the current value. When exiting these modes, the watchdog resumes operation from the stopped
value. It is the responsibility of software to avoid erroneous operation.
When not stopped, the watchdog may generate a reset to exit the low-power modes.
8.3.2.19 Programmable Interrupt Timers (PIT0, PIT1, PIT2 and PIT3)
In stop mode (or in doze mode, if so programmed), the programmable interrupt timer (PIT) ceases
operation, and freezes at the current value. When exiting these modes, the PIT resumes operation
from the stopped value. It is the responsibility of software to avoid erroneous operation.
When not stopped, the PIT may generate an interrupt to exit the low-power modes.
8.3.2.20 FlexCAN
When enabled, the FlexCAN module is capable of generating interrupts and bringing the device
out of a low-power mode. The module has 18 interrupt sources (16 sources due to message buffers
and 2 sources due to bus-off and error).
When setting stop mode in the FlexCAN (by setting the CANMCR[MDIS] bit), the FlexCAN
checks for the CAN bus to be either idle or waits for the third bit of intermission and checks to see
MCF5235 Reference Manual, Rev. 2
8-10
Freescale Semiconductor
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