MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 23
MOD5234-100IR
Manufacturer Part Number
MOD5234-100IR
Description
MOD5234 10/100 ETHERNET MODULE
Manufacturer
NetBurner Inc
Type
Controllers & Processorsr
Datasheets
1.MOD5272-100IR.pdf
(3 pages)
2.MOD5234-100IR.pdf
(4 pages)
3.MOD5234-100IR.pdf
(754 pages)
Specifications of MOD5234-100IR
Interface
I²C, SPI, UART
Voltage - Supply
2.5V
Mounting Type
Surface Mount
Package / Case
Module
Product
Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Format
-
Baud Rates
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q4483564
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26.4.3
26.4.3.1
26.4.3.2
26.4.3.3
26.4.4
26.4.5
26.4.5.1
26.4.5.2
26.4.6
26.4.6.1
26.4.6.2
27.1
27.2
27.3
27.4
27.4.1
27.4.2
27.4.3
27.4.4
27.4.5
27.4.6
27.4.7
27.4.8
27.5
27.5.1
27.5.2
27.5.3
27.5.4
27.5.5
27.6
27.6.1
27.6.2
27.6.3
27.6.4
27.6.5
27.6.6
27.6.7
Freescale Semiconductor
Paragraph
Number
Introduction ................................................................................................................... 27-1
Overview ....................................................................................................................... 27-1
Features ......................................................................................................................... 27-1
I
Memory Map/Register Definition ................................................................................ 27-8
I
2
2
C System Configuration ............................................................................................. 27-3
C Programming Examples ....................................................................................... 27-13
Looping Modes ....................................................................................................... 26-24
Multidrop Mode ...................................................................................................... 26-25
Bus Operation ......................................................................................................... 26-27
Programming .......................................................................................................... 26-27
START Signal ........................................................................................................... 27-3
Slave Address Transmission ..................................................................................... 27-4
Data Transfer ............................................................................................................ 27-4
Acknowlege .............................................................................................................. 27-4
STOP Signal ............................................................................................................. 27-5
Repeated START ...................................................................................................... 27-5
Clock Synchronization and Arbitration .................................................................... 27-6
Handshaking and Clock Stretching ........................................................................... 27-8
I
I
I
I
I
Initialization Sequence ............................................................................................ 27-13
Generation of START ............................................................................................. 27-14
Post-Transfer Software Response ........................................................................... 27-14
Generation of STOP ................................................................................................ 27-15
Generation of Repeated START ............................................................................. 27-16
Slave Mode ............................................................................................................. 27-16
Arbitration Lost ....................................................................................................... 27-16
2
2
2
2
2
C Address Register (I2ADR) ................................................................................. 27-8
C Frequency Divider Register (I2FDR) ................................................................. 27-9
C Control Register (I2CR) ................................................................................... 27-10
C Status Register (I2SR) ...................................................................................... 27-11
C Data I/O Register (I2DR) ................................................................................. 27-12
Automatic Echo Mode ........................................................................................ 26-24
Local Loop-Back Mode ...................................................................................... 26-24
Remote Loop-Back Mode ................................................................................... 26-25
Read Cycles ........................................................................................................ 26-27
Write Cycles ....................................................................................................... 26-27
Interrupt and DMA Request Initialization .......................................................... 26-28
UART Module Initialization Sequence .............................................................. 26-30
MCF5235 Reference Manual, Rev. 2
Contents
I
2
Chapter 27
C Interface
Title
Number
Page
xxiii
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