MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 515
MOD5234-100IR
Manufacturer Part Number
MOD5234-100IR
Description
MOD5234 10/100 ETHERNET MODULE
Manufacturer
NetBurner Inc
Type
Controllers & Processorsr
Datasheets
1.MOD5272-100IR.pdf
(3 pages)
2.MOD5234-100IR.pdf
(4 pages)
3.MOD5234-100IR.pdf
(754 pages)
Specifications of MOD5234-100IR
Interface
I²C, SPI, UART
Voltage - Supply
2.5V
Mounting Type
Surface Mount
Package / Case
Module
Product
Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Format
-
Baud Rates
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q4483564
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Chapter 25
Queued Serial Peripheral Interface (QSPI)
Module
25.1 Introduction
This chapter describes the queued serial peripheral interface (QSPI) module. Following a feature
set overview is a description of operation including details of the QSPI’s internal RAM
organization. The chapter concludes with the programming model and a timing diagram.
25.1.1 Overview
The queued serial peripheral interface module provides a serial peripheral interface with queued
transfer capability. It allows users to queue up to 16 transfers at once, eliminating CPU
intervention between transfers. Transfer RAM in the QSPI is indirectly accessible using address
and data registers.
25.1.2 Features
25.1.3 Module Description
The QSPI module communicates with the integrated ColdFire CPU using internal memory
mapped registers starting at IPSBAR + 0x340. See
Definition.” A block diagram of the QSPI module is shown in
Freescale Semiconductor
• Programmable queue to support up to 16 transfers without user intervention
• Supports transfer sizes of 8 to 16 bits in 1-bit increments
• Four peripheral chip-select lines for control of up to 15 devices
• Baud rates from 147.1 Kbps to 18.75 Mbps at 75 MHz
• Programmable delays before and after transfers
• Programmable QSPI clock phase and polarity
• Supports wraparound mode for continuous transfers
The GPIO module must be configured to enable the peripheral
function of the appropriate pins (refer to
Purpose I/O
Module”) prior to configuring the QSPI Module.
MCF5235 Reference Manual, Rev. 2
NOTE
Section 25.3, “Memory Map/Register
Chapter 12, “General
Figure
25-1.
25-1
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