MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 559
MOD5234-100IR
Manufacturer Part Number
MOD5234-100IR
Description
MOD5234 10/100 ETHERNET MODULE
Manufacturer
NetBurner Inc
Type
Controllers & Processorsr
Datasheets
1.MOD5272-100IR.pdf
(3 pages)
2.MOD5234-100IR.pdf
(4 pages)
3.MOD5234-100IR.pdf
(754 pages)
Specifications of MOD5234-100IR
Interface
I²C, SPI, UART
Voltage - Supply
2.5V
Mounting Type
Surface Mount
Package / Case
Module
Product
Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Format
-
Baud Rates
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q4483564
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In either case, the data bits are loaded into the data portion of the FIFO while the A/D bit is loaded
into the status portion of the FIFO normally used for a parity error (USRn[PE]).
Framing error, overrun error, and break detection operate normally. The A/D bit takes the place of
the parity bit; therefore, parity is neither calculated nor checked. Messages in this mode may still
contain error detection and correction information. One way to provide error detection, if 8-bit
characters are not required, is to use software to calculate parity and append it to the 5-, 6-, or 7-bit
character.
26.4.5
This section describes bus operation during read, write, and interrupt acknowledge cycles to the
UART module.
26.4.5.1 Read Cycles
The UART module responds to reads with byte data. Reserved registers return zeros.
26.4.5.2 Write Cycles
The UART module accepts write data as bytes only. Write cycles to read-only or reserved registers
complete normally without exception processing, but data is ignored.
26.4.6
The software flowchart,
Freescale Semiconductor
• UART module initialization—These routines consist of SINIT and CHCHK (See
• I/O driver routine—This routine (See
• Interrupt handling—Consists of SIRQ (See
Figure 26-25
routine allocates 2 words on the system FIFO. On return to the calling routine, SINIT passes
UART status data on the FIFO. If SINIT finds no errors, the transmitter and receiver are
enabled. SINIT calls CHCHK to perform the checks. When called, SINIT places the UART
in local loop-back mode and checks for the following errors:
— Transmitter never ready
— Receiver never ready
— Parity error
— Incorrect character received
the terminal input character routine which gets a character from the receiver, and OUTCH,
which sends a character to the transmitter.
UART module generates an interrupt caused by a change-in-break (beginning of a break).
Bus Operation
Programming
and
Figure
Figure
26-25, consists of the following:
26-26). Before SINIT is called at system initialization, the calling
MCF5235 Reference Manual, Rev. 2
Figure 26-28
Figure
26-28), which is executed after the
and
Figure
26-29) consists of INCH,
Functional Description
26-27
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