MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 680
MOD5234-100IR
Manufacturer Part Number
MOD5234-100IR
Description
MOD5234 10/100 ETHERNET MODULE
Manufacturer
NetBurner Inc
Type
Controllers & Processorsr
Datasheets
1.MOD5272-100IR.pdf
(3 pages)
2.MOD5234-100IR.pdf
(4 pages)
3.MOD5234-100IR.pdf
(754 pages)
Specifications of MOD5234-100IR
Interface
I²C, SPI, UART
Voltage - Supply
2.5V
Mounting Type
Surface Mount
Package / Case
Module
Product
Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Format
-
Baud Rates
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q4483564
- Current page: 680 of 754
- Download datasheet (13Mb)
Debug Support
Operand Data:
Result Data:
BDM Accesses of the Stack Pointer Registers (A7: SSP, USP)
The ColdFire version 2 core supports two unique stack pointer (A7) registers: the supervisor stack
pointer (SSP) and the user stack pointer (USP). The hardware implementation of these two
programmable-visible 32-bit registers does not uniquely identify one as the SSP and the other as
the USP. Rather, the hardware uses one 32-bit register as the currently-active A7 and the other
register is named simply the “other_A7”. Thus, the contents of the two hardware registers is a
function of the operating mode of the processor:
if SR[S] = 1
The BDM programming model supports reads and writes to the A7 and other_A7 registers
directly. It is the responsibility of the external development system to determine the mapping of
the two hardware registers (A7, other_A7) to the two program-visible definitions (supervisor and
user stack pointers), based on the Supervisor bit of the status register.
BDM Accesses of the EMAC Registers
The presence of rounding logic in the output datapath of the EMAC requires that special care be
taken during any BDM-initiated reads and writes of its programming model. In particular, it is
necessary that any result rounding modes be disabled during the read/write process so the exact
bit-wise contents of the EMAC registers are accessed.
32-36
then
else
RCREG
???
A7 = Supervisor Stack Pointer
other_A7 = User Stack Pointer
A7 = User Stack Pointer
other_A7 = Supervisor Stack Pointer
’NOT READY’
The only operand is the 32-bit Rc control register select field.
Control register contents are returned as a longword, most-significant word
first. The implemented portion of registers smaller than 32 bits is
guaranteed correct; other bits are undefined.
MS ADDR
Figure 32-34.
MCF5235 Reference Manual, Rev. 2
’NOT READY’
MS ADDR
RCREG
Command Sequence
REGISTER
CONTROL
READ
’NOT READY’
MS RESULT
NEXT CMD
BERR
XXX
XXX
Freescale Semiconductor
’NOT READY’
LS RESULT
NEXT CMD
NEXT CMD
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