DS1878T+T&R Maxim Integrated Products, DS1878T+T&R Datasheet - Page 52
DS1878T+T&R
Manufacturer Part Number
DS1878T+T&R
Description
IC CTLR SFP W/DGTL LDD RX 28TQFN
Manufacturer
Maxim Integrated Products
Type
SFP+ Controllerr
Datasheet
1.DS1878TTR.pdf
(98 pages)
Specifications of DS1878T+T&R
Input Type
*
Output Type
*
Interface
*
Current - Supply
*
Mounting Type
Surface Mount
Package / Case
28-WFQFN exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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SFP+ Controller with Digital LDD Interface
Table 01h, Register F9h: ALARM EN
52
______________________________________________________________________________________
F9h
POWER-ON VALUE
READ ACCESS
WRITE ACCESS
MEMORY TYPE
Layout is identical to ALARM
Register 71h) logic. The MASK bit (Table 02h, Register 89h) determines whether this memory exists in Table 01h or
05h.
MON3 HI
BIT 3:0
BIT 7
BIT 7
BIT 6
BIT 5
BIT 4
MON3 HI:
0 = Disables interrupt from MON3 HI alarm.
1 = Enables interrupt from MON3 HI alarm.
MON3 LO:
0 = Disables interrupt from MON3 LO alarm.
1 = Enables interrupt from MON3 LO alarm.
MON4 HI:
0 = Disables interrupt from MON4 HI alarm.
1 = Enables interrupt from MON4 HI alarm.
MON4 LO:
0 = Disables interrupt from MON4 LO alarm.
1 = Enables interrupt from MON4 LO alarm.
RESERVED
MON3 LO
00h
PW2 or (PW1 and RWTBL1C) or (PW1 and RTBL1C)
PW2 or (PW1 and RWTBL1C)
Nonvolatile (SEE)
2
2
MON4 HI
in Lower Memory, Register 71h. Enables alarms to create TXFINT (Lower Memory,
MON4 LO
RESERVED
RESERVED
RESERVED
RESERVED
BIT 0
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