SCAN25100TYA/NOPB National Semiconductor, SCAN25100TYA/NOPB Datasheet - Page 20

IC SERIAL/DESERIAL CPRI 100-TQFP

SCAN25100TYA/NOPB

Manufacturer Part Number
SCAN25100TYA/NOPB
Description
IC SERIAL/DESERIAL CPRI 100-TQFP
Manufacturer
National Semiconductor
Series
SCANr
Datasheet

Specifications of SCAN25100TYA/NOPB

Function
Serializer/Deserializer
Data Rate
2.5Gbps
Input Type
LVTTL/LVCMOS
Output Type
LVTTL, LVCMOS
Number Of Inputs
10
Number Of Outputs
10
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-TQFP Exposed Pad, 100-eTQFP, 100-HTQFP, 100-VQFP
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Operating Temperature (max)
85C
Package Type
TQFP EP
Rad Hardened
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
SCAN25100TYA

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Quantity
Price
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Quantity:
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Manufacturer:
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Quantity:
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LOF (LOSS OF FRAME) DETECTION
LOF counter is provided through an LOF MDIO status register
per CPRI Specification. The LOF function is disabled in 10-
bit mode. Under 8-bit mode, LOF will prevent the SCAN25100
DCM scheme from activating. Delay calibration measurement
can only be performed when LOF is low.
TEST MODES
Loop Back Modes
The SCAN25100 supports multiple loop back modes for test-
ing device, link, and system operation. The line loop back
mode enables the user to check the integrity of the serial data
transmission paths. The local loop back verifies operation of
the local board. When switching between normal mode and
loopback modes, the receiver must synchronize to the new
data stream.
Loopback mode can be controlled through the LOOP[1:0]
pins or via MDIO. Pulling LOOP[1:0] low enables MDIO con-
trol of loopback functions.
At-Speed Built-In Self-Test (BIST)
The SCAN25100 features at-speed built-in self-test (BIST) to
support at-speed testing during both manufacturing as well as
field diagnosis. Several test patterns are supported including
CJPAT lane 0 and PRWS 10.
BIST activation and status are accessed through the Serial
Control Interface (MDIO). Multiple registers are used for the
control, pattern selection, and customization of the at-speed
BIST function. The BIST test results are also reported in BIST
status MDIO registers. One-bit BIST_ DETECTED and
BIST_PASS status registers are provided to indicate BIST
start and pass/fail. A 10-bit counter is used to store the num-
ber of errors detected. See MDIO register list and program-
ming description for more information about at-speed BIST.
BIST is disabled in Line or Special Line loopback modes.
IEEE 1149.1 (JTAG) and 1149.6 Operation
The SCAN25100 supports a fully compliant IEEE 1149.1 in-
terface. The Test Access Port (TAP) provides access to
boundary scan cells at single-ended pins for interconnect
testing. The TAP also provides access to the IEEE 1149.6 test
features for differential pins. Refer to the (Boundary SCAN
Description Language (BSDL) file located on National's web-
site for the details of the IEEE1149.1 and 1149.6 implemen-
tation.
JTAG BIST and Enhanced BIST mode
The SCAN25100’s at-speed BIST pattern generation and
verification feature is normally accessed via the MDIO pro-
LOOP[1]
0
0
1
1
TABLE 14. Loopback Control Bit Settings
LOOP[0]
0
1
0
1
(enable software program mode)
Special line (remote) loop back
Line (remote) loop back mode
Normal mode—no loop back
Local loop back mode
Loop Back Mode
20
gramming interface, however, the BIST can also be accessed
through the JTAG bus. Access to the JTAG BIST command
requires the SCAN25100 be run in local loopback BIST mode
while RXCLK and ROUT[9:0] outputs are held in Tri-State.
Under this mode, the device requires the REFCLKP/N input
at 30.72MHz and runs PRWS10 pattern at 2.4576 Gbps.
In addition to this JTAG BIST, SCAN25100 can be re-pro-
grammed to operate in normal mode transceiver link mode,
local loopback modes, all valid speed modes, all valid de-em-
phasis modes, and all valid equalization modes. To activate
this advanced feature, a BSAMPLE instruction is executed.
Then select data shift register and shift in the register of this
order: {PE[1], PE[0], EQ[0], EQ[1], SPMODE[0], SPMODE[1],
LOCAL_EN} On the TDI input, the generator will shift in a
pattern that starts with LOCAL_EN and ends with PE[1]. For
example, to set the device into 1.2288 Gbps with max EQ,
max PE, and normal mode, shift from left to right 0, 1, 0, 1, 1,
1, and 1. SPMODE[1:0], PE[1:0], and EQ[1:0] follow the def-
initions in the datasheet except that MDIO will not override
these parameters. The device default mode when SPMODE
[1:0] = 2’b00 is 1.2288 Gbps. EQ[1:0] = 2’b00 and PE[1:0] =
2’b00 disable equalization and de-emphasis. Once the proper
data has been shifted into the BSAMPLE data register, exe-
cuting the JTAG BIST command places the device into the
BIST mode.
National recommends JTAG BIST run for at least 300ms to
ensure BIST has been completed. Once 300ms has passed,
the BIST result can be read through the data shift register.
The output is mapped as follows: {BIST START, BIST COM-
PLETE, and BIST ERROR}. BIST START is shifted out first
with BIST_ERROR last. If the test has been completed and
passed, the shifted results will be 0, 1, and 1. If the
BIST_START is 0, the receiver can not detect the BIST signal.
If BIST_COMPLETE is 0, BIST run time is not long enough.
If the BIST_ERROR goes 1, at least one bit error has oc-
curred.
Instruction codes and device pin out are documented in the
SCAN25100 BSDL file.
Precision Delay Calibration
Measurement (DCM)
The SCAN25100 DCM circuitry delivers CPRI link and mea-
surements, enabling the next generation distributed multi-hop
base station architectures as well as advanced diversity,
beam forming, and MIMO antenna systems. The DCM pre-
cisely measures absolute T14 and Toffset delays to better
than ± 800 ps and can track delay changes (in fiber optics for
example) with a resolution of 100’s of picoseconds. Measure-
ments are accessed via the MDIO interface as often as every
5 ms without interrupting CPRI link operation. The
SCAN25100 not only reports accurate CPRI link and chip de-
lays (chip latency is deterministic), but also enables mea-
surement of intra-module RE timing such as TBdelays.
For more information about using DCM, ask your local Na-
tional Semiconductor sales representative for the application
note:
Semiconductor’s SCAN25100.”
"Precision
Delay
Calibration
using
National

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