PI2EQX5864CZFE Pericom Semiconductor, PI2EQX5864CZFE Datasheet - Page 12
![IC PCI-E REDRIVER 56TQFN](/photos/6/50/65031/56-tqfn_21-0135f_sml.jpg)
PI2EQX5864CZFE
Manufacturer Part Number
PI2EQX5864CZFE
Description
IC PCI-E REDRIVER 56TQFN
Manufacturer
Pericom Semiconductor
Series
ReDriver™r
Type
Redriverr
Datasheet
1.PI2EQX5864CZFE.pdf
(20 pages)
Specifications of PI2EQX5864CZFE
Tx/rx Type
CML
Capacitance - Input
50pF
Voltage - Supply
1.15 V ~ 1.25 V
Current - Supply
800mA
Mounting Type
Surface Mount
Package / Case
56-TQFN
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Operating Temperature (max)
70C
Rad Hardened
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Delay Time
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PI2EQX5864CZFE
Manufacturer:
Pericom
Quantity:
135
Company:
Part Number:
PI2EQX5864CZFE
Manufacturer:
Pericom
Quantity:
367
The A-Channels Equalizer and Output Control register is used to control the confi guration of the input equalizer and output emphasis
and levels of the four A channels. These register bits are loaded from the input confi guration pins of the same name at power-on.
These bits may be changed if the MODE# input is set to allow I
tion, (2) Output Swing Confi guration and (3) Output Emphasis Confi guration earlier in this document for setting information. All
four A channels get the same confi guration settings.
BYTE 9 - B-Channels Equalizer and Output Control (BEOC)
SELx_B: Equalizer confi guration, Dx_B: Emphasis control, Sx_B: Output level control (see Confi guration Table)
Note: R=Read only, W=Write only, R/W=Read and Write, X=Undefi ned, rsvd=reserved for future use
The B-Channels Equalizer and Output Control register is used to control the confi guration of the input equalizer and output emphasis
and levels of the four B channels. These register bits are loaded from the input confi guration pins of the same name at power-on.
These bits may be changed if the MODE# input is set to allow I
tion, (2) Output Swing Confi guration and (3) Output Emphasis Confi guration earlier in this document for setting information. All
four B channels get the same confi guration settings.
BYTE 10 - Reserved
BYTE 11 - Reserved
Reserved Bytes 10 and 11 are also visible via the I
manufacturing test purposes and should not be changed for normal operation.
Start & Stop Conditions
A HIGH to LOW transition on the SDA line while SCL is HIGH indicates a START condition. A LOW to HIGH transition on the
SDA line while SCL is HIGH defi nes a STOP condition, as shown in the fi gure below.
Power-on
Name
Type
State
Bit
09-0002
SEL0_B
R/W
7
1
SEL1_B
R/W
1
6
SEL2_B
R/W
2
6
5
1
C interface. These bytes are R/W, are initialized to 0 at power up, are used for IC
D0_B
2
2
R/W
C confi guration. Please refer to the tables (1) Equalizer Confi gura-
C confi guration. Please refer to the tables (1) Equalizer Confi gura-
12
4
1
with Equalization, Emphasis and I
D1_B
R/W
3
1
5.0Gbps 4-Lane PCIe
D2_B
R/W
2
1
S0_B
R/W
®
1
1
2.0 ReDdriver™
PS8934D
PI2EQX5864C
2
C Control
S1_B
R/W
0
1
07/08/09