AD8159ASVZ Analog Devices Inc, AD8159ASVZ Datasheet - Page 15
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AD8159ASVZ
Manufacturer Part Number
AD8159ASVZ
Description
IC MUX/DEMUX QUAD BUFF 100TQFP
Manufacturer
Analog Devices Inc
Series
XStream™r
Datasheet
1.AD8159ASVZ.pdf
(24 pages)
Specifications of AD8159ASVZ
Applications
2:1 Multiplexer/1:2 De-Multiplexer
Interface
Serial
Voltage - Supply
3 V ~ 3.6 V
Package / Case
100-TQFP Exposed Pad, 100-eTQFP, 100-HTQFP, 100-VQFP
Mounting Type
Surface Mount
Crosspoint Switch Type
Digital
Input / Output Configuration
LVPECL, CML / CML
Control Interface
Parallel
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-40°C To +85°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Manufacturer
Quantity
Price
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Quantity:
20 000
THEORY OF OPERATION
The AD8159 relays received data on the demultiplexer Input Port
C to Output Port A and/or Output Port B, depending on the mode
selected by the BICAST control pin. On the multiplexer side,
the AD8159 relays received data on either Input Port A or Input
Port B to the Output Port C, based on the SEL[3:0] pin states.
The AD8159 is configured by toggling control pins. On the
demultiplexer side, when the device is configured in unicast
mode, it sends the received data on Input Port C to Output Port A
or Output Port B. When the device is configured in bicast mode,
received data on Input Port C is sent to both Output Port A and
Output Port B.
On the multiplexer side, only received data on Input Port A or
Input Port B is sent to Output Port C, depending on the state of the
SEL[3:0] pins. Table 4 summarizes port selection and configuration
when loopback is disabled (LB_A = LB_B = LB_C = 0).
When the device is in unicast mode, the output lanes on either
Port A or Port B are in an idle state. In the idle state, the output
tail current is set to 0 mA, and the P and N sides of the lane are
pulled up to the output termination voltage through the on-chip
termination resistors.
Table 4. Port Selection and Configuration Table
SELx
0
0
1
1
BICAST
0
1
0
1
OUT_A
IN_C
IN_C
Idle
IN_C
OUT_B
Idle
IN_C
IN_C
IN_C
OUT_C
IN_A
IN_A
IN_B
IN_B
Rev. B | Page 15 of 24
INPUT EQUALIZATION (EQ) AND OUTPUT PRE-
EMPHASIS (PE)
In backplane applications, the AD8159 needs to compensate for
signal degradation over potentially long traces. The device supports
two levels of input equalization, configured on a per-port basis.
Table 5 summarizes the high frequency gain (EQ) for each control
setting, as well as the typical length of backplane trace that can
be compensated for each setting.
Table 5. Input Equalization Settings
EQ_x
0
1
The AD8159 also has four levels of output pre-emphasis,
configured for each port. The pre-emphasis circuitry adds a
controlled amount of overshoot to the output waveform to
compensate for the loss in a backplane trace.
Table 6 summarizes the high frequency gain, amount of over-
shoot, and the typical backplane channel length (including two
connectors) that can be compensated for using each setting.
A typical backplane is made of FR4 material with 8 mil wide
traces and 8 mil spacing, loosely coupled differential traces.
Each backplane channel consists of two connectors. The total
length of the channel includes 3 inches of traces on each card.
Table 6. Output Pre-Emphasis Settings
PE_x[1]
0
0
1
1
EQ (dB)
6
12
PE_x[0]
0
1
0
1
Typical Backplane Length (Inches)
0 to 20
20 to 40+
PE (dB)
0
1.9
3.5
4.9
0%
15%
35%
60%
Overshoot
Typical
Backplane
Length (Inches)
0 to 10
10 to 20
20 to 30
30 to 40+
AD8159