Z8601720ASG Zilog, Z8601720ASG Datasheet - Page 60
Z8601720ASG
Manufacturer Part Number
Z8601720ASG
Description
IC PCMCIA INTERFACE 100-VQFP
Manufacturer
Zilog
Datasheets
1.Z1601720ASC1868.pdf
(138 pages)
2.Z1601720ASG1868.pdf
(134 pages)
3.Z1601720ASG1868.pdf
(138 pages)
Specifications of Z8601720ASG
Applications
*
Interface
*
Voltage - Supply
*
Package / Case
*
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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46
EEPROM Register
Address: SELECT 05h
Name: BCMCIA CCR Base Address Register
Type: Read/Write
Table 23.
RM001102-0901
Bit Placement
Bit 0
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Z86017/Z16017 PCMCIA Interface Solution
Reference Manual
PCMCIA CCR Base Address Register: Address 05h
Bit Name
EN_CRR_A4
EN_CRR_A5
EN_CRR_A6
EN_CRR_A7
EN_CRR_A8
EN_CRR_A9
EN_CRR_A10
DIS_CRR_MODE
Description
Enables address bit 4 to be compared as High on PCMCIA
when the PCMCIA Con•guration Register’s base address
is accessed. On Power-On Reset, this bit is set to 0.
Enables address bit 5 to be compared as High on PCMCIA
when the PCMCIA Con•guration Register’s base address
is accessed. On Power-On Reset, this bit is set to 0.
Enables address bit 6 to be compared as High on PCMCIA
when the PCMCIA Con•guration Register’s base address
is accessed. On Power-On Reset, this bit is set to 0.
Enables address bit 7 to be compared as High on PCMCIA
when the PCMCIA Con•guration Register’s base address
is accessed. On Power-On Reset, this bit is set to 0.
Enables address bit 8 to be compared as High on PCMCIA
when the PCMCIA Con•guration Register’s base address
is accessed. On Power-On Reset, this bit is set to 0.
Enables address bit 9 to be compared as High on PCMCIA
when the PCMCIA Con•guration Register’s base address
is accessed. On Power-On Reset, this bit is set to 0.
Enables address bit 10 to be compared as High on
PCMCIA when the PCMCIA Con•guration Register’s base
address is accessed. On Power-On Reset, this bit is set to 0.
Disables PCMCIA host and allows access to the PCMCIA
Con•guration Register’s base address. This bit is active
when set to 1. On Power-On Reset, this bit is set to 0.
Programming Internal Registers
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