PI7C8150BMAIE Pericom Semiconductor, PI7C8150BMAIE Datasheet - Page 76
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PI7C8150BMAIE
Manufacturer Part Number
PI7C8150BMAIE
Description
IC PCI-PCI BRIDGE ASYNC 208-FQFP
Manufacturer
Pericom Semiconductor
Datasheet
1.PI7C8150BNDE.pdf
(109 pages)
Specifications of PI7C8150BMAIE
Applications
*
Interface
*
Voltage - Supply
*
Package / Case
208-FQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
14
14.1
CONFIGURATION REGISTERS
PCI configuration defines a 64-byte space (configuration header) to define various
attributes of PI7C8150B as shown below.
CONFIGURATION REGISTER
Bus Arbiter
Preemption
Secondary
Control
Secondary Latency
Chassis Number
Reserved
Reserved
Reserved
Secondary Master Timeout Counter
Timer
31-24
Upstream (S to P) Memory Limit
Power Management Capabilities
Prefetchable Memory Limit
Upstream Memory Control
I/O Limit Upper 16-bit
Secondary Status
Arbiter Control
Primary Status
Memory Limit
Bridge Control
Device ID
Reserved
Reserved
PPB Support Extensions
GPIO Data and Control
Upstream (S to P) Memory Limit Upper 32-bit
Upstream (S to P) Memory Base Upper 32-bit
P_SERR_L Status
Subordinate Bus
Header Type
Slot Number
Class Code
Reserved
Number
Page 76 of 109
23-16
Prefetchable Limit Upper 32-bit
Prefetchable Base Upper 32-bit
ASYNCHRONOUS 2-PORT PCI-TO-PCI BRIDGE
Hot Swap Switch Time Slot
Retry Counter
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Primary Latency Timer
Next Item Pointer
Secondary Bus
Next Pointer
Next Pointer
I/O Limit
Reserved
Number
Primary Master Timeout Counter
Upstream (S to P) Memory Base
15-8
Prefetchable Memory Base
Diagnostic / Chip Control
Secondary Clock Control
Power Management Data
Extended Chip Control
I/O Base Upper 16-bit
ADVANCE INFORMATION
Memory Base
Port Option
Vendor ID
Command
April 2009 – Revision 1.08
Primary Bus Number
Capability Pointer to
Cache Line Size
P_SERR# Event
Interrupt Line
Capability ID
Capability ID
Capability ID
Revision ID
I/O Base
Disable
DCh
7-0
PI7C8150B
B4h-D8h
84h-AFh
E8h-FFh
Address
DCh
4Ch
B0h
0Ch
1Ch
2Ch
3Ch
5Ch
6Ch
7Ch
E0h
E4h
00h
04h
08h
10h
14h
18h
20h
24h
28h
30h
34h
38h
40h
44h
48h
50h
54h
58h
60h
64h
68h
70h
74h
78h
80h