PEB2255H-V13 Infineon Technologies, PEB2255H-V13 Datasheet - Page 34
PEB2255H-V13
Manufacturer Part Number
PEB2255H-V13
Description
IC INTERFACE LINE 80-MQFP
Manufacturer
Infineon Technologies
Datasheet
1.PEB2255H-V13.pdf
(374 pages)
Specifications of PEB2255H-V13
Applications
*
Interface
*
Voltage - Supply
*
Package / Case
80-SQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB2255H-V13
PEB2255H-V13IN
PEB2255H-V13IN
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PEB2255H-V13
Manufacturer:
Infineon Technologies
Quantity:
10 000
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Table 3
Pin No.
80
72
Data Sheet
RCLK
Symbol
SYNC2
Pin Definitions - Clock Generation (cont’d)
Input (I)
Output (O)
Supply (S)
I
O + PU
Function
Clock Synchronization 2
Secondary reference clock for internal transmit
clock generation.
The clock frequency is 2.048-MHz (E1) or 2.048/
1.544-MHz (T1/J1).
This function is selected by setting LIM3.ESY=1
Note: This pin contains multiple functions, see
Receive Clock
extracted from the incoming data pulses.
Clock frequency: 2048 kHz (E1) or
1544 kHz (T1/J1)
In case of loss of signal (LOS) the RCLK is
derived from the clock that is provided on
XTAL1.
If LIM0.ELOS is set, RCLK is set high in case of
loss of signal (FRS0.LOS = 1).
If NRZ mode is selected, RCLK is the buffered
RCLKI clock.
34
also ROID and XSIG.
Pin Descriptions
FALC-LH V1.3
PEB 2255
2000-07
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