DK-SI-5SGXEA7/ES Altera, DK-SI-5SGXEA7/ES Datasheet - Page 338
DK-SI-5SGXEA7/ES
Manufacturer Part Number
DK-SI-5SGXEA7/ES
Description
KIT DEV STRATIX V FPGA 5SGXEA7
Manufacturer
Altera
Series
Stratix® Vr
Type
FPGAr
Specifications of DK-SI-5SGXEA7/ES
Contents
Board
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
Stratix® V 5SGXEA7
Other names
544-2724
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9–58
Document Revision History
Table 9–21. Document Revision History
Stratix V Device Handbook Volume 2: Device Interfaces and Integration
May 2011
January 2011
December 2010
July 2010
Date
Table 9–21
Version
1.3
1.2
1.1
1.0
lists the revision history for this chapter.
■
■
■
■
■
■
■
■
No changes to the content of this chapter for the Quartus II software 10.1.
Initial release.
Chapter 9: Configuration, Design Security, and Remote System Upgrades in Stratix V Devices
Chapter moved to volume 2 for the 11.0 release.
Added
sections.
Updated
Updated “Configuration”,
EPCQ”,
sections.
Minor text edits.
Updated Table 9–7, Table 9–8, Table 9–12, and Table 9–14.
Updated Figure 9–15 and Figure 9–21.
Updated “User Watchdog Timer”, “DCLK-to-DATA[] Ratio for FPP
configuration”, “V
EPCS and EPCQ” sections.
“Remote System Upgrade Using EPCQ 256”
“JTAG
Table
9–5.
Configuration”,
CCPD
Pin”, “POR Delay Specification”, and “Programming
“Configuration
“Remote Update
Changes
Error”,
Mode”, and
“Programming EPCS and
and
May 2011 Altera Corporation
“JTAG Secure Mode”
Document Revision History
“Design Security”
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