74HC4351DB,112 NXP Semiconductors, 74HC4351DB,112 Datasheet - Page 13

IC MUX/DEMUX 8X1 20SSOP

74HC4351DB,112

Manufacturer Part Number
74HC4351DB,112
Description
IC MUX/DEMUX 8X1 20SSOP
Manufacturer
NXP Semiconductors
Series
74HCr

Specifications of 74HC4351DB,112

Package / Case
20-SSOP (0.200", 5.30mm Width)
Function
Multiplexer/Demultiplexer
Circuit
1 x 8:1
On-state Resistance
60 Ohm
Voltage Supply Source
Dual Supply
Voltage - Supply, Single/dual (±)
±2 V ~ 10 V
Current - Supply
16µA
Mounting Type
Surface Mount
Number Of Channels
1 Channel
On Resistance (max)
180 Ohm @ 4.5 V
Propagation Delay Time
90 ns
On Time (max)
300 ns @ 2 V
Off Time (max)
275 ns @ 2 V
Supply Voltage (max)
10 V
Supply Voltage (min)
2 V
Supply Current
50 mA
Maximum Power Dissipation
500 mW
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Switches
Single
Off State Leakage Current (max)
1 uA
Switch Current (typ)
25 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-2702-5
935190070112
Philips Semiconductors
AC waveforms 74HCT
Test circuit for 74HCT
March 1988
handbook, full pagewidth
HCMOS family characteristics
C
R
(1) In Fig.9 the active transition of the clock is going from LOW-to-HIGH and the active level of the forcing signals
(2) For AC measurements: t
Fig.9
L
T
(SET, RESET and PRESET) is HIGH. The actual direction of the transition of the clock input and the actual
active levels of the forcing signals are specified in the individual device data sheet.
=
=
Set-up times, hold times, removal times, propagation delays and the maximum clock pulse frequency for
sequential logic ICs.
load capacitance including jig and probe capacitance (see AC
CHARACTERISTICS for values).
termination resistance should be equal to the output impedance Z
the pulse generator.
OUTPUT
PRESET
CLOCK
RESET,
r
INPUT
INPUT
INPUT
DATA
SET,
= t
f
= 6 ns; when measuring f
handbook, halfpage
GENERATOR
10%
1.3 V
PULSE
t su
t rem
1.3 V
t r
10%
1.3 V
t PLH
90%
t WH
max
Fig.10 Test circuit.
1.3 V
V I
90%
t h
, there is no constraint on t
1/f max
t TLH
t f
R T
13
t WL
o
D.U.T
V CC
t su
of
t PHL
V O
r
, t
f
with 50% duty factor.
C L
t h
FAMILY SPECIFICATIONS
t THL
MGK565
50 pF
MGK568
3 V
GND
3 V
GND
3 V
GND

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