LAXP2-17E-5FTN256E Lattice, LAXP2-17E-5FTN256E Datasheet - Page 39
LAXP2-17E-5FTN256E
Manufacturer Part Number
LAXP2-17E-5FTN256E
Description
IC FPGA AUTO 17K LUTS 256-BGA
Manufacturer
Lattice
Datasheet
1.LAXP2-5E-5TN144E.pdf
(83 pages)
Specifications of LAXP2-17E-5FTN256E
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Lattice Semiconductor
Table 2-12. Supported Input Standards
Single Ended Interfaces
LVTTL
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12
PCI33
HSTL18 Class I, II
HSTL15 Class I
SSTL33 Class I, II
SSTL25 Class I, II
SSTL18 Class I, II
Differential Interfaces
Differential SSTL18 Class I, II
Differential SSTL25 Class I, II
Differential SSTL33 Class I, II
Differential HSTL15 Class I
Differential HSTL18 Class I, II
LVDS, MLVDS, LVPECL, BLVDS, RSDS
1. When not specified, V
Input Standard
CCIO
can be set anywhere in the valid operating range (page 3-1).
V
2-36
REF
0.75
1.25
0.9
1.5
0.9
—
—
—
—
—
—
—
—
—
—
—
—
—
(Nom.)
LA-LatticeXP2 Family Data Sheet
V
CCIO
1.8
1.5
1
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
(Nom.)
Architecture