LH28F160BVHE-BTL90 Sharp Electronics, LH28F160BVHE-BTL90 Datasheet - Page 6

• Manufacturer Part Number: LH28F160BVHE-BTL90
• Manufacturer: Sharp Electronics

Specifications of LH28F160BVHE-BTL90

• Cell Type: NOR
• Density: 16Mb
• Access Time (max): 90ns
• Interface Type: Parallel
• Boot Type: Bottom
• Address Bus: 21/20Bit
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 2M/1M
• Supply Current: 30mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Not Compliant

The boot blocks can be locked for the WP# pin. Block
erase or word/byte write for boot block must not be carried
out by WP# to Low and RP# to V,,.
The status register indicates when the WSM’s block erase
or word/byte write operation is finished.
The RY/BY# output gives an additional indicator of WSM
activity by providing both a hardware signal of status
(versus software polling) and status masking (interrupt
masking for background block erase, for example). Status
polling using RY/BY# minimizes both CPU overhead and
system power consumption. When low, RYfBY# indicates
that the WSM is performing a block erase or word/byte
write. RY/BY#-high
a new command, block erase is suspended (and word/byte
write is inactive),
device is in deep power-down
The access time is 90ns (tAv v) over the operating
temperature range (-40°C to + 5°C)
voltage range of 2.7V-3.6V.
SHARI=
word/byte write is suspended, or the
Z indicates that the WSM is ready for
mode.
8
and V,,
supply
LHF16Vll
The Automatic Power Savings (APS) feature substantially
reduces active current when the device is in static mode
power consumption and provides write protection during
reset. A reset time (tpHQv) is required from RP# switching
The device is available in 48-lead TSOP (Thin Small
(addresses not switching). In APS mode, the typical I,,,
current is 3mA at 2.7V-3.6V V,,.
When CE# and RP# pins are at V,,,
standby mode is enabled. When the RP# pin is at GND,
deep power-down
high until outputs are valid. Likewise, the device has a
wake time (tpHEL) from RP#-high until writes to the CUI
are recognized. With RP# at GND, the WSM is reset and
the status register is cleared.
Outline Package, 1.2 mm thick). Pinout is shown in Figure
2.
mode is enabled which minimizes
the I,,
Rev. 1.1
CMOS
4