UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 297
UPD78F0988AGC-8BS
Manufacturer Part Number
UPD78F0988AGC-8BS
Description
Manufacturer
Renesas Electronics America
Datasheet
1.UPD78F0988AGC-8BS.pdf
(431 pages)
Specifications of UPD78F0988AGC-8BS
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16.2 Operation of Standby Function
16.2.1 HALT mode
Clock generator
CPU
Port (output latch)
16-bit timer/event counter
8-bit timer/event counter
10-bit inverter control timer
Watchdog timer
Real-time output port
A/D converter
Serial interface
External interrupt
Externally
extended bus line
(1) Setting and operation status of HALT mode
The HALT mode is set by executing the HALT instruction.
The operation status in the HALT mode is shown in the table below.
AD0 to AD7
ASTB
WR, RD
WAIT
Item
Table 16-1. Operation Status in HALT Mode
CHAPTER 16 STANDBY FUNCTION
User’s Manual U13029EJ7V1UD
Oscillatable
Supply of clock to CPU is stopped.
Stops operation.
Retains previous status before setting HALT mode.
Operable
High impedance
Low level
High level
High impedance
Operation Status
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