M69030 Asiliant Technologies, M69030 Datasheet - Page 129

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M69030

Manufacturer Part Number
M69030
Description
Manufacturer
Asiliant Technologies
Datasheet

Specifications of M69030

Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Operating Temperature (max)
70C
Rad Hardened
No
Lead Free Status / Rohs Status
Supplier Unconfirmed

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CR17
read/write at I/O address 3B5h/3D5h with index at address 3B4h/3D4h set to 17h
shadowed for pipelines A and B
7
6
5
4
`efmp
A
B
CRT Ctrl
CRT Ctrl
Reset
Reset
CRT Controller Reset
Word Mode or Byte Mode
Address Wrap
Reserved
69030 Databook
7
CR14
Bit 6
CRT Mode Control
0
0
1
1
0: Forces horizontal and vertical sync signals to be inactive. No other registers or outputs
are affected.
1: Permits normal operation.
0: The memory address counter’s output bits are shifted by 1 bit position before being
passed on to the frame buffer address decoder such that they are made into word-aligned
addresses when bit 6 of the Underline Location Register (CR17) is set to 0.
1: The memory address counter’s output bits remain unshifted before being passed on to
the frame buffer address decoder such that they remain byte-aligned addresses when bit
6 of the Underline Location Register (CR17) is set to 0.
Note: This bit is used in conjunction with bits 6 and 5 of the CRT Mode Control Register
(CR17) to control how frame buffer addresses from the memory address counter are
interpreted by the frame buffer address decoder as shown below:
See the note at the end of this register description.
0: Wrap frame buffer address at 16KB. This is used in CGA-compatible modes.
1: No wrapping of frame buffer addresses.
Note: This bit is only effective when word mode is made active by setting bit 6 in both the
Underline Location Register and this register to 0.
See the note at the end of this register description.
Byte Mode
Byte Mode
Word or
Word or
CR17
Bit 6
6
0
1
0
1
Word Mode -- addresses from the memory address counter are shifted
once to become word-aligned
Byte Mode -- addresses from the memory address counter are not shifted
Doubleword Mode -- addresses from the memory address counter are
shifted twice to become doubleword-aligned
Doubleword Mode -- addresses from the memory address counter are
shifted twice to become doubleword-aligned
Address
Address
Wrap
Wrap
5
CRT Controller Registers
Reserved
Reserved
4
Addressing Mode
Count By 2
Count By 2
3
Retrace Sel
Retrace Sel
Horizontal
Horizontal
2
Select Row
Select Row
Scan Cntr
Scan Cntr
Revision 1.3 11/24/99
1
Mode Supp.
Mode Supp.
Compat
Compat
0
9-27

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