M69030 Asiliant Technologies, M69030 Datasheet - Page 244
M69030
Manufacturer Part Number
M69030
Description
Manufacturer
Asiliant Technologies
Datasheet
1.M69030.pdf
(387 pages)
Specifications of M69030
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Operating Temperature (max)
70C
Rad Hardened
No
Lead Free Status / Rohs Status
Supplier Unconfirmed
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M69030
Manufacturer:
CHIPS
Quantity:
20 000
Part Number:
M69030P
Manufacturer:
MIT
Quantity:
20 000
- Current page: 244 of 387
- Download datasheet (3Mb)
15-6
FR02
read/write at I/O address 3D1h with 3D0h set to index 02h
shared by both pipelines A and B
7-6
5
4
3-1
0
`efmp
A
&
B
Reserved
Direct Flat Panel Interface Output Enable
CRT Output Enable
Reserved
CRT Output Assign
69030 Databook
7
Reserved
Output Enable & Assignment Register
(00)
These bits always return the value of 0 when read.
0: The flat panel interface is disabled. All flat panel output signals are either tri-stated with
weak internal pull-down resistors or driven inactive, depending on the setting of bit 1 of
FR06. In this state, it is safe to connect/disconnect flat panels to the flat panel interface.
This is the default after reset, but if this bit is set to 0 after having been set to 1, then the flat
panel power-down sequence takes place.
1: The flat panel interface is enabled. All flat panel output signals are driven, and in this
state, it is NOT safe to connect/disconnect flat panels to the flat panel interface. When this
bit is set to 1 after having been set to 0, the panel power-up sequence takes place.
0: The CRT output is disabled. All D-to-A converters are disabled. The HSYNC and
VSYNC outputs either continue to be driven or are tri-stated depending on the setting of bit
4 of FR06. While disabled, the CRT output may be reassigned from one pipeline to another
using bit 0 of this register. This is the default after reset.
1: The CRT output is enabled. All D-to-A converters are enabled, and the HSYNC and
VSYNC outputs are driven. While enabled, the CRT output should NEVER be reassigned
from one pipeline to another.
Note: The state of this bit is also readable from bit 0 of XRD0.
These bits always return the value of 0 when read.
0: The CRT DAC and sync outputs are driven by pipeline A. This is the default after reset.
1: The CRT DAC and sync outputs are driven by pipeline B.
Important: Bit 4 of this register MUST be used to disable the CRT output BEFORE it is
switched from being driven by one pipeline to being driven by the other.
6
Interface En
Direct FP
(0)
5
Flat Panel Registers
Output En
CRT
(0)
4
3
Reserved
(000)
2
Revision 1.3 11/24/99
1
CRT Out
Assign
(0)
0
Related parts for M69030
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
Manufacturer:
Asiliant Technologies
Datasheet:
Part Number:
Description:
Manufacturer:
Asiliant Technologies
Datasheet:
Part Number:
Description:
Manufacturer:
Asiliant Technologies
Datasheet:
Part Number:
Description:
Super VGA Graphics Controller
Manufacturer:
Asiliant Technologies
Datasheet:
Part Number:
Description:
HiQV64 High Performance Multimedia Flat Panel/CRT GUI Accelerator
Manufacturer:
Asiliant Technologies
Part Number:
Description:
Manufacturer:
Asiliant Technologies
Datasheet:
Part Number:
Description:
Manufacturer:
Asiliant Technologies
Datasheet:
Part Number:
Description:
Manufacturer:
Asiliant Technologies
Datasheet:
Part Number:
Description:
Super VGA Graphics Controller
Manufacturer:
Asiliant Technologies
Datasheet:
Part Number:
Description:
HiQV64 High Performance Multimedia Flat Panel/CRT GUI Accelerator
Manufacturer:
Asiliant Technologies