M69030 Asiliant Technologies, M69030 Datasheet - Page 333
M69030
Manufacturer Part Number
M69030
Description
Manufacturer
Asiliant Technologies
Datasheet
1.M69030.pdf
(387 pages)
Specifications of M69030
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Operating Temperature (max)
70C
Rad Hardened
No
Lead Free Status / Rohs Status
Supplier Unconfirmed
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CHIPS
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M69030P
Manufacturer:
MIT
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Chapter 18
Memory-Mapped Wide Extension Registers
Introduction
The video decoder registers are 32-bit memory-mapped registers that exist in the upper memory space that
the graphics controller occupies on the host bus. Refer to chapter on address maps for more information.
These registers exist at an offset of 0x400600h from the base address of the memory space.
Table 18-1:
`efmp
Name
ER00
ER01
ER03
69030 Databook
Memory-Mapped Wide Extension Registers
Central Interrupt Control Register
Central Interrupt Pending/Acknowledge Register
Miscellaneous Function Register
Memory-Mapped Wide Extension Registers
Function
read: byte/word/Dword
read: byte/word/Dword
read: byte/word/Dword
write: Dword
write: Dword
write: Dword
Access
Revision 1.3 11/24/99
0x40060C &
0x400600 &
0x400604 &
0xC0060C
0xC00600
0xC00604
Offset
18-1
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