HD64F2168VTE33 Renesas Electronics America, HD64F2168VTE33 Datasheet - Page 113

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HD64F2168VTE33

Manufacturer Part Number
HD64F2168VTE33
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of HD64F2168VTE33

Cpu Family
H8S
Device Core Size
16/32Bit
Frequency (max)
33MHz
Interface Type
I2C/IrDA/SCI
Program Memory Type
Flash
Program Memory Size
256KB
Total Internal Ram Size
40KB
# I/os (max)
106
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-20C to 75C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Package Type
TQFP
Lead Free Status / Rohs Status
Not Compliant

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5.1
• Two interrupt control modes
• Priorities settable with ICR
• Three-level interrupt mask control
• Independent vector addresses
• Forty-one external interrupts
• DTC control
Any of two interrupt control modes can be set by means of the INTM1 and INTM0 bits in the
system control register (SYSCR).
An interrupt control register (ICR) is provided for setting interrupt priorities. Priority levels
can be set for each module for all interrupts except NMI, KIN, and WUE.
By means of the interrupt control mode, I and UI bits in CCR, and ICR, 3-level interrupt mask
control is performed.
All interrupt sources are assigned independent vector addresses, making it unnecessary for the
source to be identified in the interrupt handling routine.
NMI is the highest-priority interrupt, and is accepted at all times. Rising edge or falling edge
detection can be selected for NMI. Falling-edge, rising-edge, or both-edge detection, or level
sensing, can be selected for IRQ15 to IRQ0. An interrupt is requested at the falling edge for
KIN15 to KIN0 and WUE15 to WUE8.
The DTC can be activated by an interrupt request.
Features
Section 5 Interrupt Controller
Rev. 3.00, 03/04, page 71 of 830

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