HD64F2168VTE33 Renesas Electronics America, HD64F2168VTE33 Datasheet - Page 194

• Manufacturer Part Number: HD64F2168VTE33
• Manufacturer: Renesas Electronics America

Specifications of HD64F2168VTE33

• Cpu Family: H8S
• Device Core Size: 16/32Bit
• Frequency (max): 33MHz
• Interface Type: I2C/IrDA/SCI
• Program Memory Type: Flash
• Program Memory Size: 256KB
• Total Internal Ram Size: 40KB
• # I/os (max): 106
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: TQFP
• Lead Free Status / Rohs Status: Not Compliant

7.2.1
MRA selects the DTC operating mode.
[Legend]
*:
Rev. 3.00, 03/04, page 152 of 830
Bit
7
6
5
4
3
2
1
0
Don't care
Bit Name
SM1
SM0
DM1
DM0
MD1
MD0
DTS
Sz
DTC Mode Register A (MRA)
Initial
Value
Undefined
Undefined
Undefined
Undefined
Undefined
R/W
—
—
—
—
—
Description
Source Address Mode 1 and 0
These bits specify an SAR operation after a data
transfer.
0*: SAR is fixed
10: SAR is incremented after a transfer
11: SAR is decremented after a transfer
Destination Address Mode 1 and 0
These bits specify a DAR operation after a data
transfer.
0*: DAR is fixed
10: DAR is incremented after a transfer
11: DAR is decremented after a transfer
DTC Mode
These bits specify the DTC transfer mode.
00: Normal mode
01: Repeat mode
10: Block transfer mode
11: Setting prohibited
DTC Transfer Mode Select
Specifies whether the source side or the destination
side is set to be a repeat area or block area in repeat
mode or block transfer mode.
0: Destination side is repeat area or block area
1: Source side is repeat area or block area
DTC Data Transfer Size
Specifies the size of data to be transferred.
0: Byte-size transfer
1: Word-size transfer
(by +1 when Sz = 0, by +2 when Sz = 1)
(by –1 when Sz = 0, by –2 when Sz = 1)
(by +1 when Sz = 0, by +2 when Sz = 1)
(by –1 when Sz = 0, by –2 when Sz = 1)