HD64F2168VTE33 Renesas Electronics America, HD64F2168VTE33 Datasheet - Page 259

• Manufacturer Part Number: HD64F2168VTE33
• Manufacturer: Renesas Electronics America

Specifications of HD64F2168VTE33

• Cpu Family: H8S
• Device Core Size: 16/32Bit
• Frequency (max): 33MHz
• Interface Type: I2C/IrDA/SCI
• Program Memory Type: Flash
• Program Memory Size: 256KB
• Total Internal Ram Size: 40KB
• # I/os (max): 106
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: TQFP
• Lead Free Status / Rohs Status: Not Compliant

8.8
Port 8 is an 8-bit I/O port. Port 8 pins also function as the A/D converter external trigger input pin,
SCI_0, SCI_1, and SCI_2 clock input/output pins, IIC_0 and IIC_1 input/output pins, TMR_0,
TMR_1, TMR_X, and TMR_Y input pins, and interrupt input pins. Port 8 is an NMOS push-pull
output. Port 8 has the following registers.
• Port 8 data direction register (P8DDR)
• Port 8 data register (P8DR)
8.8.1
The individual bits of P8DDR specify input or output for the pins of port 8.
8.8.2
P8DR stores output data for the port 8 pins.
Bit
7
6
5
4
3
2
1
0
Bit
7
6
5
4
3
2
1
0
Bit Name
P87DDR
P86DDR
P85DDR
P84DDR
P83DDR
P82DDR
P81DDR
P80DDR
Bit Name
P87DR
P86DR
P85DR
P84DR
P83DR
P82DR
P81DR
P80DR
Port 8
Port 8 Data Direction Register (P8DDR)
Port 8 Data Register (P8DR)
Initial Value
0
0
0
0
0
0
0
0
Initial Value
0
0
0
0
0
0
0
0
R/W
W
W
W
W
W
W
W
W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
This register is assigned to the same address as that
of PBPIN. When this register is read, the port B states
are read.
If port 8 pins are specified for use as the general I/O
port, the corresponding port 8 pins are output ports
when the P8DDR bits are set to 1, and input ports
when cleared to 0.
Description
P8DR stores output data for the port 8 pins that are
used as the general output port.
If a port 8 read is performed while the P8DDR bits are
set to 1, the P8DR values are read. If a port 8 read is
performed while the P8DDR bits are cleared to 0, the
pin states are read.
Rev. 3.00, 03/04, page 217 of 830