HD64F2168VTE33 Renesas Electronics America, HD64F2168VTE33 Datasheet - Page 297
HD64F2168VTE33
Manufacturer Part Number
HD64F2168VTE33
Description
Manufacturer
Renesas Electronics America
Datasheet
1.HD64F2168VTE33.pdf
(876 pages)
Specifications of HD64F2168VTE33
Cpu Family
H8S
Device Core Size
16/32Bit
Frequency (max)
33MHz
Interface Type
I2C/IrDA/SCI
Program Memory Type
Flash
Program Memory Size
256KB
Total Internal Ram Size
40KB
# I/os (max)
106
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-20C to 75C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Package Type
TQFP
Lead Free Status / Rohs Status
Not Compliant
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Table 9.3
9.3.2
PWDR are 8-bit readable/writable registers. The PWM has sixteen PWM data registers. Each
PWDR specifies the duty cycle of the basic pulse to be output, and the number of additional
pulses. The value set in PWDR corresponds to a 0 or 1 ratio in the conversion period. The upper
four bits specify the duty cycle of the basic pulse as 0/16 to 15/16 with a resolution of 1/16. The
lower four bits specify how many extra pulses are to be added within the conversion period
comprising 16 basic pulses. Thus, a specification of 0/256 to 255/256 is possible for 0/1 ratios
within the conversion period. For 256/256 (100%) output, port output should be used.
9.3.3
Each PWDPR selects the PWM output phase.
• PWDPRA
Internal Clock
Frequency
φ
φ/2
φ/4
φ/8
φ/16
Bit
7 to 0 OS7 to OS0 All 0
Bit Name
PWM Data Registers 15 to 0 (PWDR15 to PWDR0)
PWM Data Polarity Registers A and B (PWDPRA and PWDPRB)
Resolution, PWM Conversion Period, and Carrier Frequency when φ = 33 MHz
Initial
Value R/W Description
Resolution
30 ns
61 ns
121 ns
242 ns
485 ns
R/W Output Select 7 to 0
These bits select the PWM output phase. Bits OS7 to OS0
correspond to outputs PW7 to PW0.
0: PWM direct output (PWDR value corresponds to high width
1: PWM inverted output (PWDR value corresponds to low
of output)
width of output)
PWM Conversion
Period
7.76 µs
15.52 µs
31.03 µs
62.06 µs
124.12 µs
Rev. 3.00, 03/04, page 255 of 830
Carrier Frequency
2063 kHz
1031 kHz
515.6 kHz
257.8 kHz
128.9 kHz
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