HD64F2168VTE33 Renesas Electronics America, HD64F2168VTE33 Datasheet - Page 334

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HD64F2168VTE33

Manufacturer Part Number
HD64F2168VTE33
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of HD64F2168VTE33

Cpu Family
H8S
Device Core Size
16/32Bit
Frequency (max)
33MHz
Interface Type
I2C/IrDA/SCI
Program Memory Type
Flash
Program Memory Size
256KB
Total Internal Ram Size
40KB
# I/os (max)
106
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-20C to 75C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Package Type
TQFP
Lead Free Status / Rohs Status
Not Compliant

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11.5.4
The rising or falling edge can be selected for the input capture input timing by the IEDGA to
IEDGD bits in TCR. Figure 11.7 shows the usual input capture timing when the rising edge is
selected.
If ICRA to ICRD are read when the corresponding input capture signal arrives, the internal input
capture signal is delayed by one system clock (φ). Figure 11.8 shows the timing for this case.
Rev. 3.00, 03/04, page 292 of 830
Figure 11.8 Input Capture Input Signal Timing (When ICRA to ICRD is Read)
φ
Input capture
input pin
Input capture signal
φ
Input capture
input pin
Input capture signal
Input Capture Input Timing
Figure 11.7 Input Capture Input Signal Timing (Usual Case)
Read cycle of ICRA to ICRD
T 1
T 2

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