HD64F2168VTE33 Renesas Electronics America, HD64F2168VTE33 Datasheet - Page 347
HD64F2168VTE33
Manufacturer Part Number
HD64F2168VTE33
Description
Manufacturer
Renesas Electronics America
Datasheet
1.HD64F2168VTE33.pdf
(876 pages)
Specifications of HD64F2168VTE33
Cpu Family
H8S
Device Core Size
16/32Bit
Frequency (max)
33MHz
Interface Type
I2C/IrDA/SCI
Program Memory Type
Flash
Program Memory Size
256KB
Total Internal Ram Size
40KB
# I/os (max)
106
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-20C to 75C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Package Type
TQFP
Lead Free Status / Rohs Status
Not Compliant
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This LSI has an on-chip 8-bit timer module (TMR_0 and TMR_1) with two channels operating on
the basis of an 8-bit counter. The 8-bit timer module can be used as a multifunction timer in a
variety of applications, such as generation of counter reset, interrupt requests, and pulse output
with an arbitrary duty cycle using a compare-match signal with two registers.
This LSI also has a similar on-chip 8-bit timer module (TMR_Y and TMR_X) with two channels.
12.1
• Selection of clock sources
• Selection of three ways to clear the counters
• Timer output controlled by two compare-match signals
• Cascading of TMR_0 and TMR_1
• Multiple interrupt sources for each channel
Figures 12.1 and 12.2 show block diagrams of 8-bit timers.
An input capture function is added to TMR_X.
TIMH261A_000120020900
TMR_0, TMR_1: The counter input clock can be selected from six internal clocks and an
TMR_Y, TMR_X: The counter input clock can be selected from three internal clocks and
The counters can be cleared on compare-match A, compare-match B, or by an external
The timer output signal in each channel is controlled by two independent compare-match
(Cascading of TMR_Y and TMR_X is not allowed)
Operation as a 16-bit timer can be performed using TMR_0 as the upper half and TMR_1
TMR_0, TMR_1,
TMR_X:
reset signal.
signals, enabling the timer to be used for various applications, such as the generation of
pulse output or PWM output with an arbitrary duty cycle.
as the lower half (16-bit count mode). TMR_1 can be used to count TMR_0 compare
match occurrences (compare-match count mode).
and TMR_Y:
external clock
an external clock
Features
Section 12 8-Bit Timer (TMR)
Three types of interrupts: Compare-match A,
compare-match B, and overflow
Four types of interrupts: Compare-match A, compare-
match B, overflow, and input capture
Rev. 3.00, 03/04, page 305 of 830
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