HD64F2168VTE33 Renesas Electronics America, HD64F2168VTE33 Datasheet - Page 361

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HD64F2168VTE33

Manufacturer Part Number
HD64F2168VTE33
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of HD64F2168VTE33

Cpu Family
H8S
Device Core Size
16/32Bit
Frequency (max)
33MHz
Interface Type
I2C/IrDA/SCI
Program Memory Type
Flash
Program Memory Size
256KB
Total Internal Ram Size
40KB
# I/os (max)
106
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-20C to 75C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Package Type
TQFP
Lead Free Status / Rohs Status
Not Compliant

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Note:
12.3.6
TICR is an 8-bit register. The contents of TCNT are transferred to TICR at the rising edge of the
external reset input. TICR cannot be directly accessed by the CPU.
12.3.7
TCORC is an 8-bit readable/writable register. The sum of contents of TCORC and TICR is always
compared with TCNT. When a match is detected, a compare-match C signal is generated.
However, comparison at the T2 state in the write cycle to TCORC and at the input capture cycle of
TICR is disabled. TCORC is initialized to H'FF.
12.3.8
TICRR and TICRF are 8-bit read-only registers. While the ICST bit in TCONRI is set to 1, the
contents of TCNT are transferred at the rising edge and falling edge of the external reset input in
that order. The ICST bit is cleared to 0 when one capture operation ends. TICRR and TICRF are
initialized to H'00.
TICRR and TICRF can be accessed when the KINWUE bit in SYSCR is 0 and the TMRX/Y bit in
TCONRS is 0. See section 3.2.2, System Control Register (SYSCR).
Bit
1
0
*
Input Capture Register (TICR)
Time Constant Register C (TCORC)
Input Capture Registers R and F (TICRR and TICRF)
Only 0 can be written, for flag clearing.
Bit Name Initial Value R/W
OS1
OS0
0
0
R/W
R/W
Description
Output Select 1 and 0
These bits specify how the TMOX pin output level is
to be changed by compare-match A of TCORA_X
and TCNT_X.
00: No change
01: 0 is output
10: 1 is output
11: Output is inverted (toggle output)
Rev. 3.00, 03/04, page 319 of 830

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