HD64F2168VTE33 Renesas Electronics America, HD64F2168VTE33 Datasheet - Page 409

• Manufacturer Part Number: HD64F2168VTE33
• Manufacturer: Renesas Electronics America

Specifications of HD64F2168VTE33

• Cpu Family: H8S
• Device Core Size: 16/32Bit
• Frequency (max): 33MHz
• Interface Type: I2C/IrDA/SCI
• Program Memory Type: Flash
• Program Memory Size: 256KB
• Total Internal Ram Size: 40KB
• # I/os (max): 106
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: TQFP
• Lead Free Status / Rohs Status: Not Compliant

Notes: 1. Only 0 can be written, to clear the flag.
Bit
3
2
1
0
2. etu: Element Time Unit (time taken to transfer one bit)
Bit Name
PER
TEND
MPB
MPBT
Initial Value
0
1
0
0
R/W
R/(W)*
R
R
R/W
1
Description
Parity Error
[Setting condition]
When a parity error is detected during reception
[Clearing condition]
When 0 is written to PER after reading PER = 1
Transmit End
TEND is set to 1 when the receiving end
acknowledges no error signal and the next transmit
data is ready to be transferred to TDR.
[Setting conditions]
•
•
[Clearing conditions]
•
•
Multiprocessor Bit
Not used in smart card interface mode.
Multiprocessor Bit Transfer
Write 0 to this bit in smart card interface mode.
When GM = 0 and BLK = 0, 2.5 etu*
transmission start
When GM = 0 and BLK = 1, 1.5 etu*
transmission start
When GM = 1 and BLK = 0, 1.0 etu*
transmission start
When GM = 1 and BLK = 1, 1.0 etu*
transmission start
When both TE in SCR and ERS are 0
When ERS = 0 and TDRE = 1 after a specified
time passed after the start of 1-byte data
transfer. The set timing depends on the register
setting as follows.
When 0 is written to TDRE after reading
TDRE = 1
When a TXI interrupt request is issued allowing
DTC to write the next data to TDR
Rev. 3.00, 03/04, page 367 of 830
2
2
2
2
after
after
after
after