HD64F2168VTE33 Renesas Electronics America, HD64F2168VTE33 Datasheet - Page 460

• Manufacturer Part Number: HD64F2168VTE33
• Manufacturer: Renesas Electronics America

Specifications of HD64F2168VTE33

• Cpu Family: H8S
• Device Core Size: 16/32Bit
• Frequency (max): 33MHz
• Interface Type: I2C/IrDA/SCI
• Program Memory Type: Flash
• Program Memory Size: 256KB
• Total Internal Ram Size: 40KB
• # I/os (max): 106
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: TQFP
• Lead Free Status / Rohs Status: Not Compliant

Reception: During reception, IR frames are converted to UART frames using the IrDA interface
before inputting to SCI_1.
Data of level 0 is output each time a high-level pulse is detected and data of level 1 is output when
no pulse is detected in a bit cycle. If a pulse has a high-level width of less than 1.41 µs, the
minimum width allowed, the pulse is recognized as level 0.
High-Level Pulse Width Selection: Table 14.13 shows possible settings for bits IrCKS2 to
IrCKS0 (minimum pulse width), and this LSI's operating frequencies and bit rates, for making the
pulse width shorter than 3/16 times the bit rate in transmission.
Rev. 3.00, 03/04, page 418 of 830
Transmission
Start
bit
Start
bit
Bit
cycle
Figure 14.37 IrDA Transmission and Reception
0
0
1
1
0
0
UART frame
IR frame
1
1
0
0
Data
Data
0
0
Reception
1
1
Pulse width is 1.6 µs to
3/16 bit cycle
1
1
0
0
Stop
bit
Stop
bit
1
1