HD64F2168VTE33 Renesas Electronics America, HD64F2168VTE33 Datasheet - Page 557
HD64F2168VTE33
Manufacturer Part Number
HD64F2168VTE33
Description
Manufacturer
Renesas Electronics America
Datasheet
1.HD64F2168VTE33.pdf
(876 pages)
Specifications of HD64F2168VTE33
Cpu Family
H8S
Device Core Size
16/32Bit
Frequency (max)
33MHz
Interface Type
I2C/IrDA/SCI
Program Memory Type
Flash
Program Memory Size
256KB
Total Internal Ram Size
40KB
# I/os (max)
106
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-20C to 75C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Package Type
TQFP
Lead Free Status / Rohs Status
Not Compliant
Available stocks
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Quantity
Price
Company:
Part Number:
HD64F2168VTE33V
Manufacturer:
Renesas
Quantity:
8 400
Company:
Part Number:
HD64F2168VTE33V
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RENESAS
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Part Number:
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Manufacturer:
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• HICR1
Bit
7
6
Bit Name Initial Value Slave Host Description
LPCBSY
CLKREQ 0
0
R
R
R/W
LPC Busy
Indicates that the LPC interface is processing a
transfer cycle.
0: LPC interface is in transfer cycle wait state
•
•
[Clearing conditions]
•
•
•
•
1: LPC interface is performing transfer cycle
[Setting condition]
•
LCLK Request
Indicates that the LPC interface's SERIRQ output is
requesting a restart of LCLK.
0: No LCLK restart request
[Clearing conditions]
•
•
•
•
1: LCLK restart request issued
[Setting condition]
•
processing
Bus idle, or transfer cycle not subject to
processing is in progress
Cycle type or address indeterminate during
transfer cycle
LPC hardware reset or LPC software reset
LPC hardware shutdown or LPC software
shutdown
Forced termination (abort) of transfer cycle
subject to processing
Normal termination of transfer cycle subject to
processing
Match of cycle type and address
LPC hardware reset or LPC software reset
LPC hardware shutdown or LPC software
shutdown
SERIRQ is set to continuous mode
There are no further interrupts for transfer to the
host in quiet mode
In quiet mode, SERIRQ interrupt output becomes
necessary while LCLK is stopped
Rev. 3.00, 03/04, page 515 of 830
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