HD64F2168VTE33 Renesas Electronics America, HD64F2168VTE33 Datasheet - Page 579

• Manufacturer Part Number: HD64F2168VTE33
• Manufacturer: Renesas Electronics America

Specifications of HD64F2168VTE33

• Cpu Family: H8S
• Device Core Size: 16/32Bit
• Frequency (max): 33MHz
• Interface Type: I2C/IrDA/SCI
• Program Memory Type: Flash
• Program Memory Size: 256KB
• Total Internal Ram Size: 40KB
• # I/os (max): 106
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: TQFP
• Lead Free Status / Rohs Status: Not Compliant

Bit
4
3
Bit Name Initial Value Slave Host Description
SMIE3B
SMIE3A
0
0
R/W
R/W
R/W


Host SMI Interrupt Enable 3B
Enables or disables a host SMI interrupt request
when OBF3B is set by a TWR15 write.
0: Host SMI interrupt request by OBF3B and
SMIE3B is disabled
[Clearing conditions]
•
•
•
1: [When IEDIR3 = 0]
[Setting condition]
•
Host SMI Interrupt Enable 3A
Enables or disables a host SMI interrupt request
when OBF3A is set by an ODR3 write.
0: Host SMI interrupt request by OBF3A and
SMIE3A is disabled
[Clearing conditions]
•
•
•
1: [When IEDIR3 = 0]
[Setting condition]
•
[When IEDIR3 = 1]
[When IEDIR3 = 1]
Host SMI interrupt request by setting OBF3B to 1
is enabled
Host SMI interrupt is requested
Host SMI interrupt request by setting OBF3A to 1
is enabled
Host SMI interrupt is requested
Writing 0 to SMIE3B
LPC hardware reset, LPC software reset
Clearing OBF3B to 0 (when IEDIR3 = 0)
Writing 1 after reading SMIE3B = 0
Writing 0 to SMIE3A
LPC hardware reset, LPC software reset
Clearing OBF3A to 0 (when IEDIR3 = 0)
Writing 1 after reading SMIE3A = 0
Rev. 3.00, 03/04, page 537 of 830