HD64F2168VTE33 Renesas Electronics America, HD64F2168VTE33 Datasheet - Page 593

• Manufacturer Part Number: HD64F2168VTE33
• Manufacturer: Renesas Electronics America

Specifications of HD64F2168VTE33

• Cpu Family: H8S
• Device Core Size: 16/32Bit
• Frequency (max): 33MHz
• Interface Type: I2C/IrDA/SCI
• Program Memory Type: Flash
• Program Memory Size: 256KB
• Total Internal Ram Size: 40KB
• # I/os (max): 106
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: TQFP
• Lead Free Status / Rohs Status: Not Compliant

16.3.18 SMIC Interrupt Register 1 (SMICIR1)
SMICIR1 is one of the registers used to implement SMIC mode. This register includes the bits that
enables/disables an interrupt to the slave. The IBFI3 interrupt is enabled by setting the IBFIE3 bit
in HICR2 to 1.
Bit
7 to 5 
4
3
2
1
0
Bit Name Initial Value Slave Host Description
HDTWIE 0
HDTRIE
STARIE
CTLWIE
BUSYIE
All 0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W






Reserved
The initial value should not be changed.
Transfer Data Transmission End Interrupt Enable
Enables or disables HDTWI interrupt that is IBFI3
interrupt source to the slave.
0: Disables transfer data transmission end interrupt
1: Enables transfer data transmission end interrupt
Transfer Data Receive End Interrupt Enable
Enables or disables HDTRI interrupt that is IBFI3
interrupt source to the slave.
0: Disables transfer data receive end interrupt
1: Enables transfer data receive end interrupt
Status Code Receive End Interrupt Enable
Enables or disables STARI interrupt that is IBFI3
interrupt source to the slave.
0: Disables status code receive end interrupt
1: Enables status code receive end interrupt
Control Code Transmission End Interrupt Enable
Enables or disables CTLWI interrupt that is IBFI3
interrupt source to the slave.
0: Disables control code transmission end interrupt
1: Enables control code transmission end interrupt
Transfer Start Interrupt Enable
Enables or disables BUSYI interrupt that is IBFI3
interrupt source to the slave.
0: Disables transfer start interrupt
1: Enables transfer start interrupt
Rev. 3.00, 03/04, page 551 of 830