HD64F2168VTE33 Renesas Electronics America, HD64F2168VTE33 Datasheet - Page 708

• Manufacturer Part Number: HD64F2168VTE33
• Manufacturer: Renesas Electronics America

Specifications of HD64F2168VTE33

• Cpu Family: H8S
• Device Core Size: 16/32Bit
• Frequency (max): 33MHz
• Interface Type: I2C/IrDA/SCI
• Program Memory Type: Flash
• Program Memory Size: 256KB
• Total Internal Ram Size: 40KB
• # I/os (max): 106
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: TQFP
• Lead Free Status / Rohs Status: Not Compliant

20.5.2
Software protection is set up in any of two ways: by disabling the downloading of on-chip
programs for programming and erasing and by means of a key code.
Table 20.10 Software Protection
20.5.3
Error protection is a mechanism for aborting programming or erasure when an error occurs, in the
form of the microcomputer entering runaway during programming/erasing of the flash memory or
operations that are not according to the established procedures for programming/erasing. Aborting
programming or erasure in such cases prevents damage to the flash memory due to excessive
programming or erasing.
If the microcomputer malfunctions during programming/erasing of the flash memory, the FLER
bit in the FCCS register is set to 1 and the error-protection state is entered, and this aborts the
programming or erasure.
The FLER bit is set in the following conditions:
1. When an interrupt such as NMI occurs during programming/erasing.
2. When the flash memory is read during programming/erasing (including a vector read or an
3. When a SLEEP instruction (including software-standby mode) is executed during
4. When a bus master other than the CPU, such as the DTC, gets bus mastership during
Rev. 3.00, 03/04, page 666 of 830
Item
Protection by the
SCO bit
Protection by the
FKEY register
instruction fetch).
programming/erasing.
programming/erasing.
Software Protection
Error Protection
Description
•
•
The program/erase-protected state is
entered by clearing the SCO bit in
FCCS which disables the downloading
of the programming/erasing programs.
Downloading and
programming/erasing are disabled
unless the required key code is written
in FKEY. Different key codes are used
for downloading and for
programming/erasing.
Download
Function to be Protected
Program/Erase