HD64F2168VTE33 Renesas Electronics America, HD64F2168VTE33 Datasheet - Page 76

• Manufacturer Part Number: HD64F2168VTE33
• Manufacturer: Renesas Electronics America

Specifications of HD64F2168VTE33

• Cpu Family: H8S
• Device Core Size: 16/32Bit
• Frequency (max): 33MHz
• Interface Type: I2C/IrDA/SCI
• Program Memory Type: Flash
• Program Memory Size: 256KB
• Total Internal Ram Size: 40KB
• # I/os (max): 106
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: TQFP
• Lead Free Status / Rohs Status: Not Compliant

Table 2.4
Instruction Size*
ADD
SUB
ADDX
SUBX
INC
DEC
ADDS
SUBS
DAA
DAS
MULXU
MULXS
DIVXU
[Legend]
*:
B:
W:
L:
Rev. 3.00, 03/04, page 34 of 830
Size refers to the operand size.
Byte
Word
Longword
Arithmetic Operations Instructions (1)
B/W/L
B
B/W/L
L
B
B/W
B/W
B/W
Function
Rd ± Rs → Rd, Rd ± #IMM → Rd
Performs addition or subtraction on data in two general registers, or on
immediate data and data in a general register. (Subtraction on
immediate data and data in a general register cannot be performed in
bytes. Use the SUBX or ADD instruction.)
Rd ± Rs ± C → Rd, Rd ± #IMM ± C → Rd
Performs addition or subtraction with carry on data in two general
registers, or on immediate data and data in a general register.
Rd ± 1 → Rd, Rd ± 2 → Rd
Adds or subtracts the value 1 or 2 to or from data in a general register.
(Only the value 1 can be added to or subtracted from byte operands.)
Rd ± 1 → Rd, Rd ± 2 → Rd, Rd ± 4 → Rd
Adds or subtracts the value 1, 2, or 4 to or from data in a 32-bit register.
Rd (decimal adjust) → Rd
Decimal-adjusts an addition or subtraction result in a general register by
referring to CCR to produce 4-bit BCD data.
Rd × Rs → Rd
Performs unsigned multiplication on data in two general registers: either
8-bit × 8-bit → 16-bit or 16-bit × 16-bit → 32-bit.
Rd × Rs → Rd
Performs signed multiplication on data in two general registers: either 8-
bit × 8-bit → 16-bit or 16-bit × 16-bit → 32-bit.
Rd ÷ Rs → Rd
Performs unsigned division on data in two general registers: either 16-bit
÷ 8-bit → 8-bit quotient and 8-bit remainder or 32-bit ÷ 16-bit → 16-bit
quotient and 16-bit remainder.