PEB 3081 H V1.4 Infineon Technologies, PEB 3081 H V1.4 Datasheet - Page 38

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PEB 3081 H V1.4

Manufacturer Part Number
PEB 3081 H V1.4
Description
IC S-BUS INTERFACE EXT MQFP44
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEB 3081 H V1.4

Function
S / T Bus Interface Transceiver
Interface
IOM-2, ISDN, SCI
Number Of Circuits
1
Voltage - Supply
3.3V
Current - Supply
30mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
64-QFP
Includes
D-Channel Access Control, Monitor Channel Handler
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
PEB3081HV1.4XT
PEB3081HV14XP
SP000007583
SP000007584
SBCX-X
PEB 3081
Description of Functional Blocks
3.3.1
S/T-Interface Coding
Transmission over the S/T-interface is performed at a rate of 192 kbit/s. 144 kbit/s are
used for user data (B1+B2+D), 48 kbit/s are used for framing and maintenance
information.
Line Coding
The following figure illustrates the line code. A binary ONE is represented by no line
signal. Binary ZEROs are coded with alternating positive and negative pulses with two
exceptions:
For the required frame structure a code violation is indicated by two consecutive pulses
of the same polarity. These two pulses can be adjacent or separated by binary ONEs.
In bus configurations a binary ZERO always overwrites a binary ONE.
0 1 1
code violation
Figure 15
S/T-Interface Line Code
Frame Structure
Each S/T frame consists of 48 bits at a nominal bit rate of 192 kbit/s. For user data
(B1+B2+D) the frame structure applies to a data rate of 144 kbit/s (see
Figure
16).
In the direction TE ® NT the frame is transmitted with a two bit offset. For details on the
framing rules please refer to ITU I.430 section 6.3. The following figure illustrates the
standard frame structure for both directions (NT ® TE and TE ® NT) with all framing
and maintenance bits.
Data Sheet
38
2003-02-04

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