PEB 3086 F V1.4 Infineon Technologies, PEB 3086 F V1.4 Datasheet - Page 24
PEB 3086 F V1.4
Manufacturer Part Number
PEB 3086 F V1.4
Description
IC ISDN ACCESS CTRLR TQFP64
Manufacturer
Infineon Technologies
Series
ISAC™r
Datasheet
1.PEB_3086_F_V1.4.pdf
(262 pages)
Specifications of PEB 3086 F V1.4
Function
Subscriber Access Controller
Interface
HDLC, IOM-2, ISDN, Parallel, SCI
Number Of Circuits
1
Voltage - Supply
3.3V
Current - Supply
30mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
64-LFQFP
Includes
D-Channel Access Control and Priority Handler, Monitor Channel Handler, Non-Auto Mode, Transparent Mode
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
PEB3086FV1.4XT
PEB3086FV14NP
PEB3086FV14XP
SP000007571
SP000007572
PEB3086FV14NP
PEB3086FV14XP
SP000007571
SP000007572
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Table 2
Pin No.
MQFP-64
TQFP-64
41
3
1
5
38
IOM-2 Interface
52
53
Data Sheet
Symbol
ALE
CS
INT
RES
AMODE
FSC
DCL
ISAC-SX Pin Definitions and Functions (cont’d)
Input (I)
Output (O)
Open Drain
(OD)
I
I
OD (O)
I
I
I/O
I/O
Function
Address Latch Enable
A HIGH on this line indicates an address on the
external address/data bus (multiplexed bus type
only).
ALE also selects the microcontroller interface bus
type (multiplexed or non multiplexed).
Chip Select
A low level indicates a microcontroller access to the
ISAC-SX.
Interrupt Request
INT becomes active low (open drain) if the ISAC-SX
requests an interrupt.
The polarity can be reprogrammed to high active
with push-pull characteristic.
Reset
A LOW on this input forces the ISAC-SX into a reset
state.
Address Mode
Selects between direct (0) and indirect (1) register
access mode.
Frame Sync
8-kHz frame synchronization signal.
Data Clock
IOM-2 interface clock signal (double clock) (e.g
1.536 MHz in TE mode).
24
Pin Configuration
PEB 3086
2003-01-30
ISAC-SX
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