PEF 24470 H V1.3 Infineon Technologies, PEF 24470 H V1.3 Datasheet - Page 35
PEF 24470 H V1.3
Manufacturer Part Number
PEF 24470 H V1.3
Description
IC MTSI-XL SWITCHING MQFP100
Manufacturer
Infineon Technologies
Series
SWITIr
Datasheet
1.PEF_20450_H_V1.3.pdf
(129 pages)
Specifications of PEF 24470 H V1.3
Function
Switching IC
Interface
PCM, PLL
Number Of Circuits
1
Voltage - Supply
3.13 V ~ 3.47 V
Current - Supply
200mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-SQFP
Includes
Clock Shift, Data Rate Adaption, Multipoint Switching
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
PEF24470HV1.3X
SP000007617
SP000007617
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PRELIMINARY
3.4.3
If the phase alignment function is enabled all PLL output signal and the main divider are
edge synchronized with the PLL clock input. If the selected reference signal is less than
2.048 MHz the edge synchronization resolution depends on the selected external
crystal/oscillator frequency. If the phase alignment function is disabled the PLL output
frequency (49.152 MHz) is edge synchronized with the PLL input frequency and the
main divider output frequencies are edge synchronized with PLL output frequency.
An example of phase alignment functionality is shown in
Phase alignment is required to keep the output signals in phase relative to the input
signals. After reset phase alignment is automatically activated in slave mode and turned
off in master mode.
Note: The phase alignment should be disabled for all reference frequencies
Figure 9
Preliminary Data Sheet
< 2.048 MHz.
Phase Alignment
Example of Phase Alignment
P h a s e alig n m en t
P h a s e alig n m en t
disabled
enabled
M a in divid er ou tp ut
M a in divid er ou tp ut
(4 9 .15 2 M H z)
(4 9 .15 2 M H z)
(2.04 8 M H z)
A P LL o utp u t
(2.04 8 M H z)
A P LL o utp u t
A P L L in pu t
A P L L in pu t
26
p h ase diffe re nce
PEF 20450 / 20470 / 24470
Figure
Architectural Description
9.
sw iti_0 91 .em f
2001-11-20
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